Datasheet
Datasheet, Volume 2 177
Processor Integrated I/O (IIO) Configuration Registers
3.3.3.31 VTUNCERRMSK—Intel
®
VT Uncorrectable Error Mask Register
3.3.3.32 VTUNCERRSEV—Intel
®
VT Uncorrectable Error Severity Register
VTUNCERRMSK
Bus: 0 Device: 5 Function: 0 Offset: 1AC
Bit Attr
Reset
Value
Description
31 RWS 0b Mask reporting Intel VT-d defined errors to IIO core logic
30:9 RV 0h Reserved
8RWS0bProtected memory region space violated mask
7RWS0b
Illegal request to FEEh Mask
Illegal request to FEEh, GPA/HPA limit error mask
6RWS0b
Unsuccessful status received in the coherent interface read completion
mask
5RWS0bTLB1 Parity Error Mask
4RWS0bTLB0 Parity Error Mask
3RWS0bData Parity Error while doing a L3 lookup mask
2RWS0bData Parity Error while doing a L2 lookup mask
1RWS0bData Parity Error while doing a L1 lookup mask
0RWS0bData Parity Error while doing a context cache look up mask
VTUNCERRSEV
Bus: 0 Device: 5 Function: 0 Offset: 1B0
Bit Attr
Reset
Value
Description
31 RWS 0b
VT-d Specification Defined Error Severity
When set, this bit escalates reporting of Intel VT-d specification defined errors, as
FATAL errors. When clear, those errors are escalated as Nonfatal errors.
30:9 RV 0h Reserved
8RWS1bProtected memory region space violated severity
7RWS1b
Illegal Request to FEEh Severity
Illegal request to FEEh, GPA/HPA limit error severity
6RWS0b
Unsuccessful status received in the coherent interface read completion
severity
5RWS1bTLB1 Parity Error Severity
4RWS1bTLB0 Parity Error Severity
3RWS1bData Parity Error while doing a L3 lookup severity
2RWS1bData Parity Error while doing a L2 lookup severity
1RWS1bData Parity Error while doing a L1 lookup severity
0RWS1bData Parity Error while doing a context cache look up severity