Datasheet

Processor Integrated I/O (IIO) Configuration Registers
176 Datasheet, Volume 2
3.3.3.29 IOTLBPARTITION—IOTLB Partitioning Control Register
3.3.3.30 VTUNCERRSTS—Uncorrectable Error Status Register
IOTLBPARTITION
Bus: 0 Device: 5 Function: 0 Offset: 194
Bit Attr
Reset
Value
Description
31:29 RV 0h Reserved
28:27 RW 00b Range Selection for DMI[20:22]
26:25 RW 00b Range Selection for IOU24 upper X2 link
24:23 RW 00b Range Selection for IOU23 upper X2 link
22:15 RV 0h Reserved
14:13 RW 00b Range Selection for Intel ME
12:11 RW 00b Range Selection for CB
10:9 RW 00b Range Selection for INTR
8:1 RV 0h Reserved
0RW-LB0b
IOTLB Partitioning Enable
0 = Disabled
1 = Enabled
VTUNCERRSTS
Bus: 0 Device: 5 Function: 0 Offset: 1A8
Bit Attr
Reset
Value
Description
31 RW1CS 0b
Intel VT-d Specification Defined Errors
This bit is set when an Intel VT-d specification defined error has been detected
(and logged in the Intel VT-d fault registers)
30:9 RV 0h Reserved
8RW1CS0bProtected memory region space violated status
7RW1CS0b
Illegal request to FEEh
Illegal request to FEEh; GPA/HPA limit error status
6RW1CS0b
Unsuccessful status received in the coherent interface read completion
status
5RW1CS0bTLB1 parity error status
4RW1CS0bTLB0 parity error status
3RW1CS0bData parity error while doing a L3 lookup status
2RW1CS0bData parity error while doing a L2 lookup status
1RW1CS0bData parity error while doing a L1 lookup status
0RW1CS0bData parity error while doing a context cache look up status