Datasheet

Processor Integrated I/O (IIO) Configuration Registers
158 Datasheet, Volume 2
3.3.2.8 HDR—Header Type Register
This register identifies the header layout of the configuration space.
3.3.2.9 SVID—Subsystem Vendor ID Register
3.3.2.10 SID—Subsystem Device ID Register
HDR
Bus: 0 Device: 5 Function: 0,2,4 Offset: 0Eh
Bit Attr
Reset
Value
Description
7RO1b
Multi-function Device
This bit defaults to 1b since all these devices are multi-function For Devive 4, 6,
7, BIOS can individually control the value of this bit in function 0 of these devices,
based on HDRTYPECTRL register. BIOS will set these control bits to change this
field to 0 in function#0 of these devices, if it exposes only function 0 in the device
to OS.
6:0 RO 00h
Configuration Layout
This field identifies the format of the configuration header layout. It is Type 0 for
all these devices. The default is 00h, indicating a ’endpoint device’.
7RO1b
Multi-function Device
This bit defaults to 1b since all these devices are multi-function. For Device 4, 6,
7, BIOS can individually control the value of this bit in function#0 of these
devices, based on HDRTYPECTRL register. BIOS will set these control bits to
change this field to 0 in function 0 of these devices, if it exposes only function 0 in
the device to OS.
SVID
Bus: 0 Device: 5 Function: 0, 2,4 Offset: 2Ch
Bit Attr
Reset
Value
Description
15:0 RW-O 8086h
Subsystem Vendor Identification Number
The default value specifies Intel but can be set to any value once after reset.
SCID
Bus: 0 Device: 5 Function: 0,2,4 Offset: 2Eh
Bit Attr
Reset
Value
Description
15:0 RW-O 00h
Subsystem Device Identification Number
Assigned by the subsystem vendor to uniquely identify the subsystem