Datasheet
Datasheet, Volume 2 153
Processor Integrated I/O (IIO) Configuration Registers
Table 3-17. I/OxAPIC PCI Configuration Space Map – Device 5/Function 4 –
Offset 00h–FFh
DID VID 0h RDINDEX 80h
PCISTS PCICMD 4h
84h
CCR RID 8h
88h
HDR CLSR Ch 8Ch
MBAR 10h RDWINDOW 90h
14h 94h
18h 98h
1Ch 9Ch
20h IOAPICTETPC A0h
24h A4h
28h A8h
SDID SVID 2Ch
ACh
30h B0h
CAPPTR 34h B4h
38h B8h
INTPIN INTL 3Ch BCh
ABAR 40h C0h
PXPCAP 44h
C4h
48h C8h
4Ch CCh
50h D0h
54h D4h
58h D8h
5Ch DCh
60h E0h
64h E4h
68h E8h
PMCAP 6Ch
ECh
PMCSR 70h
F0h
74h F4h
78h F8h
7Ch FCh