Datasheet

Processor Integrated I/O (IIO) Configuration Registers
150 Datasheet, Volume 2
Table 3-14. IIO Control/Status and Global Error Register Map – Device 5, Function 2 –
Offset 100h–1FFh
RESERVED PCIe Header space 100h 180h
104h 184h
108h 188h
10Ch 18Ch
110h 190h
114h 194h
118h 198h
11Ch 19Ch
120h 1A0h
124h 1A4h
128h 1A8h
12Ch 1ACh
130h 1B0h
134h 1B4h
138h 1B8h
13Ch 1BCh
140h GNERRST
144h GFERRST
148h GERRCTL
14Ch GSYSST
150h GSYSCTL
154h
158h
15Ch GFFERRST
160h
164h
168h GFNERRST
16Ch GNFERRST
170h
174h
178h GNNERRST
17Ch