Datasheet

Processor Integrated I/O (IIO) Configuration Registers
134 Datasheet, Volume 2
3.2.8 DMI Root Complex Register Block (RCRB)
This block is mapped into memory space, using register DMIRCBAR [Device 0:Function
0, offset 50h].
Table 3-8. DMI2 RCRB Registers
DMIVC0RCAP 10h 90h
DMIVC0RCTL 14h
94h
DMIVC0RSTS
18h 98h
DMIVC1RCAP 1Ch
9Ch
DMIVC1RCTL 20h
A0h
DMIVC1RSTS
24h A4h
DMIVCPRCAP 28h
A8h
DMIVCPRCTL 2Ch
ACh
DMIVCPRSTS
30h B0h
DMIVCMRCAP 34h
B4h
DMIVCMRCTL 38h
B8h
DMIVCMRSTS
3Ch BCh
DMIRCLDECH 40h
C0h
DMIESD 44h
C4h
48h C8h
4Ch CCh
DMILED 50h
D0h
54h D4h
DMILBA0 58h
D8h
5Ch DCh
DMIVC1CdtThrottle 60h
E0h
DMIVCpCdtThrottle 64h
E4h
DMIVCmCdtThrottle 68h
E8h
6Ch ECh
70h F0h
74h F4h
78h F8h
7Ch FCh
80h 100h
84h 104h
88h 108h
8Ch 10Ch