Datasheet

5
2.0 Specification
2.1 Pin Assignments
2.2 Pin Description
Pin No.
Signal
I/O*
Description
03
-RESET
I
Hardware reset signal from the host
19, 17, 15, 13, 11,
09, 07, 05. 06, 08,
10, 12, 14, 16, 18,
20
DD0~DD15(Device Data)
I/O
16-bit bi-direction Data Bus. DD(7:0) are
used for 8-bit register transfers.
22
DMARQ(DMA Request)
O
For DMA data transfers. Device will
assert DMARQ when the device is ready
to transfer data to or from the host.
24
-DIOW(I/O Write)
I
This is the strobe signal used by the host
to write to the device register or Data
port
STOP(Stop UDMA Burst)
The host assert this signal during an
UDMA burst to stop the DMA burst