Specifications

January 13, 2021
Page 15/31
Document Ref: isp_lora_DS4520_R7
Insight SiP
Green Side 400 avenue Roumanille BP 309 06906 Sophia-Antipolis Cedex France
www.insightsip.com
Pin
Name
Pin function
Description
31
GND
Ground
Power Ground Must be connected to ground on application PCB
32
GND
Ground
Power Ground Must be connected to ground on application PCB
33
GND
Ground
Power Ground Must be connected to ground on application PCB
34
BLE_ANT
RF I/O
Internal BLE antenna RF I/O pin
Should be connected to Pin 35 for normal operation
35
BLE_TR
RF I/O
BLE RF I/O pin of the module
Should be connected to Pin 34 for normal operation
36
GND
Ground
Power Ground Must be connected to ground on application PCB
37
SWDCLK
Digital I/O
nRF52 Serial Wire Debug clock input for debug and programming
38
SWDIO
Digital I/O
nRF52 Serial Wire Debug I/O for debug and programming
39
P0_20
TRCCLK
Digital I/O
nRF52 general purpose I/O pin
Trace port clock output
40
P0_21
RESET
Digital I/O
nRF52 general purpose I/O pin
May be configured as nRF52 RESET pin
41
P0_18
TRCDAT0
Digital I/O
nRF52 general purpose I/O pin
Trace port output
42
P0_16
TRCDAT1
Digital I/O
nRF52 general purpose I/O pin
Trace port output
43
P0_15
TRCDAT2
Digital I/O
nRF52 general purpose I/O pin
Trace port output
44
P0_14
TRCDAT3
Digital I/O
nRF52 general purpose I/O pin
Trace port output
45 .. 73
NC
Not Connected
Isolated pad on application PCB for mechanical stability
74
GND
Ground
Segmented Ground Plane
Must be connected to ground on application PCB
ISP4520 pad
placement and pin
assignment for the
LGA QFN package
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