Datasheet

Data Sheet 27 V1.5, 2012-08-17
TLE 8102 SG
Smart Dual Channel Powertrain Switch
SPI Control
6SPI Control
The SPI protocol of the TLE8102SG provides two types of registers: control and diagnosis. After power-on reset,
all register bits are set to default values.
Serial Input
Default Value: xxxx
H
Field Bits Type Description
CMD
7:5 w Command
001 Diagnosis only: The requested data
is shifted out at SO.
The data bits are ignored.
010 Output Configure: Configures th
e behavior of the power
outputs.
011 I/O Configure: Configures the behavior of the
I/O ports.
100 Reset Registers: Resets all internal registers to their reset
va
lues. The data bits are ignored.
101 Sleep Mode: Activates the low quiescent mode. In sleep
mode, only the
command “wake up” will be accepted.
Other commands will not be accepted. Wake up can be
performed by sending the wake up command or by
performing an undervoltage reset. The data bits are
ignored.
110 Wake up: Deactivates the sleep mode. After time delay
t
wake
, the device becomes fully functional. The data bits
are ignored.
111 Channels ON/OFF: Turns on/off the power outputs (if
co
nfigured for serial control)
000 No command: Not accepted as a valid command and the
data bits
will be ignored. Additionally, the diagn
osis register
will not be reset.
DATA 4:0 w Data
Data written to register selected
by CMD
76543210
CMD
DATA
wwwwwwww
Output Configure
Defa
ult Value: 00
H
76543210
0 1 0 LIM2 LIM1 RES SLE2 SLE1
wwwwwwww
Field Bits Type Description
LIMn n+2 w Over load current limitation channel n
0 Current limit 2 is active (
I
Dn(lim2)
)
1 Current limit 1 is active (
I
Dn(lim1)
)