Data Sheet, V1.
TLE 8102 SG Smart Dual Channel Powertrain Switch Table of Contents Table of Contents Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Smart Dual Channel Powertrain Switch coreFLEX 1 TLE8102SG Overview Features • • • • • • • • • Overload Protection DMOS Overtemperature protection Open load detection Current limitation Low quiescent current mode 3.
TLE 8102 SG Smart Dual Channel Powertrain Switch Overview Parameter Summary Parameter Symbol Value Unit Supply voltage VDD VDS(CL) RON(max. @ 150°C) 4.5 … 5.5 V 48 … 60 V 0.
TLE 8102 SG Smart Dual Channel Powertrain Switch Overview 2 Overview 2.1 Terms Figure 2 shows all terms used in this Target Data Sheet.
TLE 8102 SG Smart Dual Channel Powertrain Switch Pin Configuration 3 Pin Configuration 3.1 Pin Assignment P-DSO-12 IN2 1 12 GND SI 2 11 CO2 OUT2 3 10 VDD CO1 4 9 OUT1 SCLK 5 8 CS GND 6 7 IN1 P-DSO-12_TLE8102.vsd Figure 3 Pin Configuration (top view) Both GND pins and the heat sink must be connected to GND externally. 3.
TLE 8102 SG Smart Dual Channel Powertrain Switch Maximum Ratings and Operating Conditions 4 Maximum Ratings and Operating Conditions 4.1 Absolute Maximum Ratings Absolute Maximum Ratings 1) Tj = -40 ⋅C to +150 ⋅C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol 4.1.1 Supply Voltage 4.1.2 Continuous Drain Source Voltage (OUT1 to OUT2) 4.1.3 Limit Values Unit Conditions Min. Max. VDD VDS -0.3 7 V – -0.
TLE 8102 SG Smart Dual Channel Powertrain Switch Maximum Ratings and Operating Conditions 4.2 Pos. 4.2.1 Operating Conditions Parameter Symbol Output Clamping Energy (single EAS event), linearly decreasing current1) Limit Values Min. Typ. Max. – – 75 Unit Conditions mJ ID(0) = 2 A, TJ(0) = 150 °C, max. 100 cycles over lifetime Thermal Resistance 4.2.2 4.2.3 RthJSP Junction to ambient (see Figure 4) RthJA Junction to case – 1.
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks 5 Electrical and Functional Description of Blocks 5.1 Power Supply The TLE8102SG is supplied by power supply line VDD, used for the digital as well as the analog functions of the device including the gate control of the power stages. A capacitor between pins VDD to GND is recommended. The TLE8102SG can be programmed via SPI to enter sleep mode.
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks Electrical Characteristics: Parallel Inputs VDD = 4.5 V to 5.5 V, Tj = -40 ⋅C to +150 ⋅C, (unless otherwise specified) all voltages with respect to ground, positive current flowing into pin Pos. Parameter Symbol 5.2.1 Input Low Voltage 5.2.2 Input High Voltage VINL VINH VINHys IIN(1 … 2) 5.2.3 Input Voltage Hysteresis 5.2.
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks Maximum Load Inductance During demagnetization of inductive loads, energy has to be dissipated in the TLE8102SG.
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks For timing information, please refer to Figure 9 and Figure 10 for details. OVL NO O VL OVL Condition IN ON O FF ID (lim 1) I O UT Inom Inom t d(fault) V B at V O UT t d(fault) t d(fault) t
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks OVL OVL Condition IN ON OFF ILIM 2 Failure latched ID(lim 2) Inom ILIM2 Failure latched ILIM 2 Failure latched I OUT t d(off) V Bat V O UT t d(off) shutdown t d(off) shutdown shutdown I*R ON set ST reset set FAU LT SO HH (Norm al Function) CS set reset HL (O VL) HH HL HH HL HH reset V alid SP I cycles OL_CurrLim2.
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks O utput chann el with OT condition OT O FF IN No O T condition ON T herm al toggling Therm a l toggling T herm al to ggling IO U T V OUT set (without delay tim e) ST set rewritten FA U LT T wo B it S O D iag no stic: O T F la g : HH L H L (O V L) H (O T ) reset HH HL HL HL H H (N o rm a l Fu n ction ) L H H H L (N o O T co nditio n) reset CS V alid S P I c ycles OT_behaviour_Restar
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks Output channel with OT condition OT IN OFF No OT condition ON OT Failure latched IOUT Thermal shutdown V OUT set ST reset rewritten set FAULT SO Two Bit Diagnostic: HH L OT Flag: HL (OVL) H (OT) reset HH HL H L HL H reset CS HH (Normal Function) L (No OT condition) Valid SPI cycles OT_behaviour_Latch.vsd Figure 12 Over Temperature Behavior - Latched Shutdown 5.3.
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks Electrical Characteristics: Power Outputs VDD = 4.5 V to 5.5 V, Tj = -40 ⋅C to +150 ⋅C, (unless otherwise specified) all voltages with respect to ground, positive current flowing into pin Pos. Parameter Symbol 5.3.
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks 5.4 Diagnostic Functions The TLE8102SG provides diagnosis information about the device and about the load. The following diagnosis functions are implemented: • • • • The protective functions (flags CLn and Tn) of channel n are registered in the diagnosis flag Pn. The open load diagnosis of channel n is registered in the diagnosis flag OLn.
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks VDD VDS (S G) SPI CHn MUX 00 01 10 I DS (S G) SGn VDS (OL) IDS (P D) OLn STn / FAULT ISn OR OUTn OR gate control under current detection UCn CLn Pn OR Tn protective functions IIS n current sense diagnosis.emf GND Figure 13 Block Diagram of Diagnostic Functions Electrical Characteristics: Diagnostic Functions VDD = 4.5 V to 5.
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks Figure 14 Open load (off) and Short to GND Diagnostics OL/ UC O L(“O FF”)/U C (“O N ”) C ondition IN ON I O UT V Bat O FF Inom ID(UC) td(fault) t d(fault) t d(fault) V OUT t d(fault) t d(fault) t d(fault) V DS(O L) reset ST t d(fault) t
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks SHG/ UC SHG(“O FF”) /UC (“ON”) Condition IN ON OFF Inom I OUT V Bat NO SHG/UC ID(UC) td(fault) td(fault) V OUT td(fault) t d(fault) t d(fault) td(fault) t
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks Electrical Characteristics: Current Sense VDD = 4.5 V to 5.5 V, Tj = -40 ⋅C to +150 ⋅C, (unless otherwise specified) all voltages with respect to ground, positive current flowing into pin Pos. Parameter Symbol 5.5.1 Current Sense Precision (single channel)1) IFB/IOUT PIS Limit Values Min. 5.5.2 Current Sense Temperature Deviation1) 2) 3) at 0.50 0.80 0.90 0.93 0.94 0.95 Typ. 1.
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks 1.50 1.40 1.30 1.20 I FB /I OUT [mA/A] 1.10 1 0.90 0.80 0.70 0.60 0.60 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 ID [A] Current_Sense_points.vsd Figure 17 Current Sense Precision 1.50 1.40 1.30 1.20 I FB /IO UT [mA/A] 1.10 1 0.90 0.80 0.70 0.60 0.50 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 Expected Distribution of Current Sense Precision. Not testet.
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks 5.6 SPI Interface The diagnosis and control interface is based on a serial peripheral interface (SPI). The SPI is a full duplex synchronous serial slave interface, which uses four lines: SO, SI, SCLK and CS. Data is transferred by the lines SI and SO at the data rate given by SCLK. The falling edge of CS indicates the beginning of a data access.
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks SO - Serial Output: Data is shifted out serially at this pin, the most significant bit first. SO is in high impedance state until the CS pin goes to low state. New data will appear at the SO pin following the rising edge of SCLK. Please refer to Section 6 for further information. 5.6.2 Daisy Chain Capability The SPI of TLE8102SG is daisy chain capable.
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks Electrical Characteristics: SPI Interface (cont’d) VDD = 4.5 V to 5.5 V, Tj = -40 ⋅C to +150 ⋅C, (unless otherwise specified) all voltages with respect to ground, positive current flowing into pin Pos. 5.6.3 Parameter Symbol SO High State Output Voltage VSOH Limit Values Unit Conditions Min. Typ. Max. VDD - – – V ISOH = 2 mA 0.4 VSOL fSCK – – 0.4 V ISOL = 2.
TLE 8102 SG Smart Dual Channel Powertrain Switch Electrical and Functional Description of Blocks 5.7 Timing Diagrams t t CS(lead) CS(lag) t CS(td) tSCLK(P) CS 0.7Vdd 0.2Vdd t SCLK(H) tSCLK(L) 0.7Vdd SCLK 0.2Vdd t SI(su) tSI(h) 0.7Vdd SI 0.2Vdd tSO(v) tSO(dis) 0.7Vdd 0.2Vdd SO spi_timing_TLE8102L.vsd Figure 22 Data Sheet Serial Interface Timing Diagram 26 V1.
TLE 8102 SG Smart Dual Channel Powertrain Switch SPI Control 6 SPI Control The SPI protocol of the TLE8102SG provides two types of registers: control and diagnosis. After power-on reset, all register bits are set to default values. Serial Input Default Value: xxxxH 7 6 5 4 3 w 1 0 w w DATA CMD w 2 w w w w Field Bits Type Description CMD 7:5 w Command 001 Diagnosis only: The requested data is shifted out at SO. The data bits are ignored.
TLE 8102 SG Smart Dual Channel Powertrain Switch SPI Control Field Bits Type Description RES 2 w Over temperature behavior of all channels 0 Automatic autorestart of a channel after cooling down 1 Latching shutdown at over temperature SLEn n-1 w Slew rate of channel n 0 Slew rate 1 1 Slew rate 2 I/O Configure Default Value: 00H 7 6 5 4 0 1 1 DIA w w w w 3 2 1 BOL w 0 SENS w w w Field Bits Type Description DIA 4 w Status / SPI of diagnostic information 0 Diagnosis outpu
TLE 8102 SG Smart Dual Channel Powertrain Switch SPI Control E Serial Output (Standard Diagnosis) Default Value: FFH 7 6 – – r r 5 4 CH2 (CH21 CH20) r r 3 2 CH1 (CH11 CH10) r r 1 0 Channel IC Over temp. Over temp. r r Field Bits Type Description CHn 2n+1: 2n r Standard Diagnosis for Channel n 00 Short circuit to ground 01 Open load / Under current 10 Over load / over temperature 11 Normal operation Channel over temp.
TLE 8102 SG Smart Dual Channel Powertrain Switch Application Description 7 Application Description 12V IN1 OUT1 LDO 5V VDD 10 µF 10 kOhm I/O I/O PWM PWM 10 kOhm ST1 ST2 µC CS SPI co ntr ol, protection and d ia gno sis IN2 OUT2 SCLK SI AppDiag_Status.
TLE 8102 SG Smart Dual Channel Powertrain Switch Application Description 12V IN1 IN2 co ntr ol, protection and d ia gno sis OUT1 LDO 5V VDD 10 µF 10kOhm I/O I/O PWM PWM FAULT SO µC CS SPI OUT2 SCLK SI AppDiag_SPI_Fault.vsd Figure 25 Application Circuit using SPI and Fault Flag VBatt IN1 I/O IN2 VDD 10k 10k I/O ST1 I/O ST2 CS 10µF OUT1 control, protect ion and diagno sis I/O OUT2 SCLK SI Micro Controller AppDiag_noSPI.
TLE 8102 SG Smart Dual Channel Powertrain Switch Package Outlines 0.8 Index Marking1 5˚±3˚ 35 Bottom View 7 6 6 0.25B 12 1.6±0.1 (Metal ) 4.2±0.1 (Metal ) (4.4 Mold ) 6.4±0.11) B (Mold) 7 B 10.3±0.3 7.6+0.13 -0.1 12 7.5±0.11) 0.7±0.15 7.8±0.1 (Heatslug) (1.8 Mold ) 0.1 +0.075 0.25-0 .0 (1.55) 0+0.1 STANDOFF 2.35±0.1 (Body) Package Outlines 2.6 MAX. 8 1 Heatslu 1 12x 0.4+0.13 0.25M C A B 5x 1 = 5 5.1±0.
TLE 8102 SG Smart Dual Channel Powertrain Switch Revision History 9 Version Revision History Date Changes 2012-08-17: Version 1.5: Data Sheet: V1.5 2012-08-17 Figure 26 corrected. No Functional Change 08-05-08: Version 1.4: Data Sheet: V1.4 08-05-08 Table 1 corrected. Functionality not changed. V1.4 08-05-08 Figure 14 corrected. No functional change. 08-04-24: Version 1.3: Data Sheet: V1.3 Data Sheet 08-04-24 Data Sheet released 33 V1.
Edition 2012-08-17 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2012. All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”).