Datasheet

TLE 6389
Datasheet Rev. 2.1 15 2007-08-13
4.27 Load regulation ∆V
VOUT
/
∆I
LOAD
40 mV/
A
TLE6389-2 GV50,
TLE6389-3
GV50,
I
OUT
= 0.5A to 2A;
V
VS
= 5.8V & 48V;
R
SENSE
= 22mΩ
4.28 8*
V
OUT
_nom
/
V
mV/
A
TLE6389-2 GV,
I
OUT
= 0.5 to 2A;
V
VS
= 13.5V & 48V;
R
SENSE
= 22mΩ
4.29 Gate driver,
PMOS off
V
VS
–
V
GDRV
0 0.2 V V
ENABLE/SI_ENABLE
= 5 V
C
BDS
= 220 nF
C
GDRV
= 4.7nF
4.30 Gate driver,
PMOS on
V
VS
–
V
GDRV
6 8.2 V V
ENABLE/SI_ENABLE
= 5 V
C
BDS
= 220 nF
C
GDRV
= 4.7nF
3)
4.31 Gate driver,
UV lockout
V
VS
–
V
BDS
2.75 4 V Decreasing (V
VS
-
V
BDS
) until GDRV
is permanently at
VS level
4.32 Gate driver,
peak charging
current
I
GDRV
1 A PMOS dependent;
2)
4.33 Gate driver,
peak discharging
current
I
GDRV
1 A PMOS dependent;
2)
4.34 Gate driver,
gate voltage, rise
time
t
r
45 60 ns V
ENABLE/SI_ENABLE
= 5 V
C
BDS
= 220 nF
C
GDRV
= 4.7nF
4 Electrical Characteristics (cont’d)
5V < V
VS
< 48V; -40°C < T
j
< 150 °C;
All voltages with respect to ground; positive current defined flowing into the pin; unless otherwise specified
Item Parameter Symbol Limit Values Unit Test Condition
min. typ. max.