Datasheet

TLE6368-G2
Data Sheet 43 Rev. 2.32, 2010-10-19
Logic Output DO
3.4.153 H - o u tp u t
voltage level
V
DOH
V
Q_LDO1
– 1.0
V
Q_LDO1
– 0.8
–VI
DOH
=1 mA
3.4.154 L - o u tp u t
voltage level
V
DOL
– 0.2 0.4 V I
DOL
= – 1.6 mA
3.4.155 T r i -s t a t e
leakage
current
I
DO_TRI
– 10 – 10 μA V
CS
= V
Q_LDO1
;
0V < V
DO
<
V
Q_LDO1
3.4.156 T r i -s t a t e
input
capacitance
C
DO
–1015pFV
CS
=V
Q_LDO1
0V < V
Q_LDO1
<
5.25 V
Data Input Timing
3.4.157 Clo c k p e ri od
t
pCLK
400 – – ns
1)
3.4.158 Clock high
time
t
CLKH
100 – – ns
1)
3.4.159 Clock low
time
t
CLKL
100 – – ns
1)
3.4.160 Clock low
before CS
low
t
bef
500 – – ns
1)
3.4.161 C S setup
time
t
lead
500 – – ns
1)
3.4.162 CLK setup
time
t
lag
500 – – ns
1)
3.4.163 Clock low
after CS high
t
beh
500 – – ns
1)
3.4.164 DI s e t u p time t
DISU
50 – – ns
1)
3.4.165 DI hold time t
DIHO
50 – – ns
1)
Data Output Timing
-40 < T
j
<150 °C; V
IN
=13.5V unless otherwise specified
Item Parameter Symbol Limit Values Unit Test Conditions
min. typ. max.