Datasheet

TLE 6365
Data Sheet 9 Rev. 1.9, 2007-07-30
Circuit Description
Below some important sections of the TLE 6365 are described in more detail.
Power On Reset
In order to avoid any system failure, a sequence of several conditions has to be passed.
In case of
V
CC
power down (V
CC
< V
RT
for t > t
RR
) a logic LOW signal is generated at the
pin RO to reset an external microcontroller. When the level of
V
CC
reaches the reset
threshold
V
RT
, the signal at RO remains LOW for the Power-up reset delay time t
RD
before switching to HIGH. If V
CC
drops below the reset threshold V
RT
for a time extending
the reset reaction time
t
RR
, the reset circuit is activated and a power down sequence of
period
t
RD
is initiated. The reset reaction time t
RR
avoids wrong triggering caused by short
“glitches” on the
V
CC
-line.
Figure 3 Reset Function
AET03325.VSD
Invalid Invalid
Start Up
Invalid
V
CC
t
V
PG
V
RT
Typ. 4.70 V
Typ. 4.65 V
1 V
< t
RR
< t
RD
t
RO
ON Delay
H
L
Started
ON Delay
Stopped
t
RD
t
RR
t
RD
ON Delay
Power Start-Up Normal Failed N Failed Normal