Datasheet

Data Sheet 10 Rev. 2.1, 2007-08-08
TLE6258-2G
Bus Receiver
Receiver threshold
voltage, recessive to
dominant edge
V
bus,rd
0.44
× V
S
0.48
× V
S
–V-8 V < V
bus
< V
bus,dom
Receiver threshold
voltage, dominant to
recessive edge
V
bus,dr
– 0.56
× V
S
0.6 ×
V
S
V V
bus,rec
< V
bus
< 20 V
Receiver hysteresis
V
bus,hys
0.02
×
V
S
0.04
×
V
S
0.1 ×
V
S
mV V
bus,hys
= V
bus,rec
-
V
bus,dom
Receiver threshold center
voltage
V
bus,cnt
0.475
×
V
S
0.5 ×
V
S
0.525
×
V
S
LIN2.0 table 3.1
Input leakage current
I
bus,lek
-1 mA V
bus
= 0V, V
bat
= 12V,
pull-up resistor as
specified in LIN2.0
Wake-up threshold
voltage
V
wake
0.40
× V
S
0.5 ×
V
S
0.6 ×
V
S
V–
Bus Transmitter
Bus recessive output
voltage
V
bus,rec
0.9 ×
V
S
– V
S
V V
TxD
= V
CC
Bus dominant output
voltage
V
bus,dom
0–2VV
TxD
= 0 V
7.3V<V
S
<27V
0–1.2V
V
TxD
= 0 V
6V<V
S
<7.3V
Bus short circuit current
I
bus,sc
40 100 150 mA V
bus,short
= 13.5 V
Leakage current
I
bus,lk
-1 - – mA V
CC
= 0 V, V
S
= 0 V,
V
bus
= -8 V,
–1020µA
V
CC
= 0 V,
V
S
= 13.5V,
V
bus
= 20 V,
Bus pull-up resistance
R
bus
20 30 47 kΩ –
Table 4 Electrical Characteristics (cont’d)
4.5 V <
V
CC
< 5.5 V; 6.0 V < V
S
< 27 V; R
L
= 500 Ω; V
ENN
< V
ENN,ON
; -40 °C < T
j
< 125
°C; all voltages with respect to ground; positive current flowing into pin; unless otherwise
specified.
Parameter Symbol Limit Values Unit Remark
Min. Typ. Max.