Datasheet

TLE42754
Pin Configuration
Data Sheet 6 Rev. 1.11, 2012-01-20
3.3 Pin Assignment TLE42754E (PG-SSOP-14 exposed pad)
Figure 3 Pin Configuration (top view)
3.4 Pin Definitions and Functions TLE42754E (PG-SSOP-14 exposed pad)
Pin Symbol Function
1,3,5,7 n.c. not connected
leave open or connect to GND
2ROReset Output
open collector output; external pull-up resistor to a positive potential required;
leave open if the reset function is not needed
4GNDGround
6D Reset Delay Timing
connect a ceramic capacitor to GND for adjusting the reset delay time;
leave open if the reset function is not needed
8,10,11,12,
14
n.c. not connected
leave open or connect to GND
9Q Output
block to GND with a capacitor close to the IC terminals, respecting the values given
for its capacitance C
Q
and ESR in the table “Functional Range” on Page 8
13 I Input
for compensating line influences, a capacitor to GND close to the IC terminals is
recommended
Pad – Exposed Pad
connect to heatsink area;
connect with GND on PCB
n.c.
n.c.
Q
n.c.
n.c.
n.c.
I
n.c.
n.c.
D
n.c.
GND
n.c.
RO
1
2
3
4
5
6
7
14
9
10
11
12
13
8
PINCONFIG_SSOP-14.SVG