Datasheet

Data Sheet 2 Rev. 2.7, 2007-06-25
TLE 4271-2
Figure 1 Pin Configuration (top view)
Table 1 Pin Definitions and Functions
Pin Symbol Function
1I Input; block to ground directly on the IC with ceramic capacitor.
2INH Inhibit
3RO Reset Output; the open collector output is connected to the
5 V output via an integrated resistor of 30 kΩ.
4GNDGround
5D Reset Delay; connect a capacitor to ground for delay time adjustment.
6WI Watchdog Input
7Q 5-V Output; block to ground with 22 µF capacitor, ESR < 3 Ω.
AEP01939
GNDINH
Ι
RO
WI
D
Q
17
GNDINH
Ι
RO
1
WI
AEP02017
D
Q
7
AEP01938
INH
RO
GND
17
WI
D
Ι
Q
PG-TO220-7-11 PG-TO220-7-12 PG-TO263-7-1