Datasheet

ManualsBrandsINFINEON TECHNOLOGIES ManualsVoltage RegulatorsTLE4270-2G

5-V Low Drop Fixed Voltage Regulator

TLE 4270-2

Data Sheet 1 Rev. 1.8, 2007-11-09

Type Package

TLE 4270-2 G PG-TO263-5-1

TLE 4270-2 D PG-TO252-5-11

P-TO252-5-1

Features

• Output voltage tolerance ≤ ±2%

• 650 mA output current capability

• Low-drop voltage

• Reset functionality

• Adjustable reset time

• Suitable for use in automotive electronics

• Integrated overtemperature protection

• Reverse polarity protection

• Input voltage up to 42 V

• Overvoltage protection up to 65 V (≤ 400 ms)

• Short-circuit proof

• Wide temperature range

• ESD protection: ±2kV HBM

• Green Product (RoHS compliant)

• AEC Qualified

Functional Description

This device is a 5-V low drop fixed-voltage regulator. The maximum input voltage is 42 V

(65 V, ≤ 400 ms). Up to an input voltage of 26 V and for an output current up to 650 mA

it regulates the output voltage within a 2% accuracy. The short circuit protection limits

the output current of more than 650 mA. The device incorporates overvoltage protection

and a temperature protection which turns off the device at high temperatures.

1) ESD susceptibility, Human Body Model (HBM) according to EIA/JESD 22-A114B

Summary of content (17 pages)

PAGE 1
5-V Low Drop Fixed Voltage Regulator TLE 4270-2 Features • • • • • • • • • • • • • • • Output voltage tolerance ≤ ±2% 650 mA output current capability Low-drop voltage Reset functionality Adjustable reset time Suitable for use in automotive electronics Integrated overtemperature protection Reverse polarity protection Input voltage up to 42 V Overvoltage protection up to 65 V (≤ 400 ms) Short-circuit proof Wide temperature range ESD protection: ±2kV HBM1) Green Product (RoHS compliant) AEC Qualified P-TO
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TLE 4270-2 PG-TO263-5-1 PG-TO252-5 GND 1 5 Ι 1 RO D GND Q 5 Ι RO D Q AEP02580 AEP01922 Figure 1 Pin Configuration (top view) Table 1 Pin Definitions and Functions Pin Symbol Function 1 I Input; block to ground directly at the IC with a ceramic capacitor. 2 RO Reset Output; the open collector output is connected to the 5-V output via an integrated resistor of 30 kΩ. 3 GND Ground; internally connected to heatsink.
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TLE 4270-2 Circuit Description The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a voltage that is proportional to the output voltage and drives the base of a series transistor via a buffer. Saturation control as a function of the load current prevents any over-saturation of the power element.
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TLE 4270-2 Temperature Sensor I Saturation Control and Protection Circuit 1 5 Control Amplifier Q Buffer Bandgap Reference Reset Generator 2 4 RO D Adjustment 3 GND Figure 2 Data Sheet AEB01924 Block Diagram 4 Rev. 1.
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TLE 4270-2 Table 2 Absolute Maximum Ratings Tj = -40 to 150 °C Parameter Symbol Limit Values Unit Notes Min. Max. VI VI II -42 – – 42 65 – V V – – VRO IRO -0.3 – 7 – V – – Internally limited VD ID -0.3 – 7 – V – – Internally limited VQ IQ -1.0 – 16 – V – – Internally limited IGND -0.
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TLE 4270-2 Table 4 Characteristics VI = 13.5 V; -40 °C ≤ Tj ≤ 125 °C (unless otherwise specified) Parameter Symbol Limit Values Min. Typ. Max. Unit Test Condition Output voltage VQ 4.90 5.00 5.10 V 5 mA ≤ IQ ≤ 550 mA; 6 V ≤ VI ≤ 26 V Output voltage VQ 4.90 5.00 5.10 V Output current limiting IQmax 650 850 – mA 26 V ≤ VI ≤ 36 V; IQ ≤ 300 mA VQ = 0 V Current consumption Iq = II - IQ Iq – 1 1.
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TLE 4270-2 Table 4 Characteristics (cont’d) VI = 13.5 V; -40 °C ≤ Tj ≤ 125 °C (unless otherwise specified) Parameter Symbol Limit Values Min. Typ. Max. Unit Test Condition Upper reset timing threshold VDU 1.4 1.8 2.3 V – Lower reset timing threshold VDL 0.2 0.45 0.
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TLE 4270-2 II I 1 1000 µF Q 5 IQ 470 nF 22 µF TLE4270-2 TLE 4270G 2 3 GND 4 D VI RO IR VQ VR ID VD IGND CD AES01925 Figure 3 Test Circuit I 1 Input 470 nF Reset to µC 5 Q 5 V - Output TLE 4270 TLE4270-2 RO 2 4 3 D 22 µF GND 100 nF AES01926 Figure 4 Data Sheet Application Circuit 8 Rev. 1.
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TLE 4270-2 Design Notes for External Components An input capacitor CI is necessary for compensation of line influences. The resonant circuit consisting of lead inductance and input capacitance can be damped by a resistor of approx. 1 Ω in series with CI. An output capacitor CQ is necessary for the stability of the regulating circuit. Stability is guaranteed at values of CQ ≥ 22 µF and an ESR of < 3 Ω. Reset Circuitry If the output voltage decreases below 4.
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TLE 4270-2 VI < trr VQ VRT dV ID, c = dt CD VDU VD VDL trd trr VRO Power-ON Reset Figure 5 Data Sheet Thermal Shutdown Voltage Drop at Input Undervoltage Secondary Load Spike Bounce AES01927 Reset Time Response 10 Rev. 1.
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TLE 4270-2 Output Voltage VQ versus Temperature Tj VQ Output Voltage VQ versus Input Voltage VI AED01928 5.2 V AED01929 12 VQ 5.1 V 10 VI = 13.5 V 5.0 8 4.9 6 4.8 4 4.7 2 4.6 -40 0 40 80 0 120 ˚C 160 R L = 25 Ω 0 2 4 6 Tj Output Current IQ versus Temperature Tj Output Current IQ versus Input Voltage VI AED01930 1200 mA IQ A 1000 1.0 800 0.8 600 0.6 400 0.4 200 0.2 0 40 80 0 120 ˚C 160 Tj Data Sheet AED03038 1.
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TLE 4270-2 Current Consumption Iq versus Output Current IQ Current Consumption Iq versus Output Current IQ AED03092 3 Ι q mA Ιq AED03093 80 mA 70 60 2 50 40 VΙ = 13.5 V 30 1 VΙ = 13.
PAGE 13
TLE 4270-2 Charge Current ID,c versus Temperature Tj Upper Reset Timing Threshold VDU versus Temperature Tj AED03047 20 µA I 18 V DU 3.5 3.0 16 I D, c 2.5 14 VΙ = 13.5 V VI = 13.5 V VD = 1 V 12 2.0 V DU 10 1.5 8 1.0 6 0.5 4 -40 0 40 80 0 -40 120 ˚C 160 Tj Data Sheet AED03094 4.0 mA 0 40 80 120 ˚C 160 Tj 13 Rev. 1.
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TLE 4270-2 Package Outlines 4.4 10 ±0.2 1.27 ±0.1 A 8.5 1) B 0.05 2.4 0.1 2.7 ±0.3 4.7 ±0.5 7.55 1) 9.25 ±0.2 (15) 1±0.3 0...0.3 0...0.15 5 x 0.8 ±0.1 0.5 ±0.1 4 x 1.7 0.25 M A B 8˚ MAX. 1) Typical Metal surface min. X = 7.25, Y = 6.9 All metal surfaces tin plated, except area of cut. 0.
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TLE 4270-2 6.5 +0.15 -0.05 A 1) 2.3 +0.05 -0.10 B (5) 0.51 MIN. 0.15 MAX. per side 0.5 +0.08 -0.04 0.9 +0.20 -0.01 0...0.15 0.8 ±0.15 (4.24) 1 ±0.1 9.98 ±0.5 6.22 -0.2 5.7 MAX. 5 x 0.6 ±0.1 0.5 +0.08 -0.04 1.14 4.56 0.1 B 0.25 M A B 1) Includes mold flashes on each side. All metal surfaces tin plated, except area of cut.
PAGE 16
TLE 4270-2 Revision History Revision History Version Date Rev. 1.8 2007-11-09 Page 1: Changed ESD specification from “>4000V” to “±2kV HBM” according to PCN No. 2007-089 Rev. 1.7 2007-03-20 Initial version of RoHS-compliant derivate of TLE 4270 Change of product name to TLE 4270-2 due to modified chip layout and size.
PAGE 17
Edition 2007-11-09 Published by Infineon Technologies AG 81726 Munich, Germany © 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics.