Datasheet

Data Sheet 10 Rev. 1.2, 2010-11-26
TLE42694
General Product Characteristics
4.3 Thermal Resistance
Pos. Parameter Symbol Limit Value Unit Conditions
Min. Typ. Max.
Junction to Soldering Point
1)
1) not subject to production test, specified by design
R
thJSP
– 80 – K/W measured to pin 5
Junction to Ambient
1)
R
thJA
– 113 – K/W
2)
2) Specified R
thJA
value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
– 170 – K/W Footprint only
3)
3) Specified R
thJA
value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm
3
board with 1 copper layer (1 x 70µm Cu).
– 142 – K/W 300mm
2
heatsink area on
PCB
3)
– 136 – K/W 600mm
2
heatsink area on
PCB
3)
Junction to Soldering Point
1)
R
thJSP
– 27 – K/W measured to group of pins
3, 4, 5, 10, 11, 12
Junction to Ambient
1)
R
thJA
– 63 – K/W
2)
– 104 – K/W Footprint only
3)
– 73 – K/W 300mm
2
heatsink area on
PCB
3)
– 65 – K/W 600mm
2
heatsink area on
PCB
3)
Junction to Soldering Point
1)
R
thJSP
– 10 – K/W measured to pin 5
Junction to Ambient
1)
R
thJA
– 47 –
2)
– 145 – K/W Footprint only
3)
– 63 – K/W 300mm
2
heatsink area on
PCB
3)
– 53 – K/W 600mm
2
heatsink area on
PCB
3)
TLE42694G (PG-DSO-8)
4.3.4
4.3.5
4.3.6
4.3.7
4.3.8
TLE42694GM (PG-DSO-14)
4.3.9
4.3.10
4.3.11
4.3.12
4.3.13
TLE42694E (PG-SSOP-14 exposed pad)
4.3.14
4.3.15
4.3.16
4.3.17
4.3.18