Datasheet
C505/C505C/C505A/C505CA
Data Sheet 54 12.00
Basic Programming Mode Selection
The basic programming mode selection scheme is shown in Figure 28.
Figure 28
Basic Programming Mode Selection
RESET
PSEN
PROG
EA/V
PP
“1“
“0“
PSEL
“0“
V
DD
Clock
(XTAL1/XTAL2)
5V
stable
PRD
PALE
“1“
“0“
Ready for access
mode selection
During this period signals
are not actively driven
0V
V
IH
V
PP
PMSEL1,0
0,1










