Datasheet

Data Sheet 1 12.00
C505/C505C/C505A/
C505CA
8-Bit Single-Chip Microcontroller
C500 Family
Advance Information
• Fully compatible to standard 8051 microcontroller
• Superset of the 8051 architecture with 8 datapointers
• Up to 20 MHz operating frequency
– 375 ns instruction cycle time @16 MHz
– 300 ns instruction cycle time @20 MHz (50 % duty cycle)
• On-chip program memory (with optional memory protection)
– C505(C)(A)-2R : 16K byte on-chip ROM
– C505A-4R/C505CA-4R: 32K byte on-chip ROM
– C505A-4E/C505CA-4E: 32K byte on-chip OTP
– alternatively up to 64k byte external program memory
• 256 byte on-chip RAM
• On-chip XRAM
– C505/C505C : 256 byte
– C505A/C505CA : 1K byte
(more features on next page)
Figure 1
C505 Functional Units
Oscillator
Watchdog
Timer
C500
8-bit
USART
I/O
I/O
8 digit. I/O
I/O
RAM
XRAM
On-Chip Emulation Support Module
Timer 2
Watchdog Timer
8 analog inputs /
Full-CAN Controller
8 Datapointers
I/O (2-bit I/O port)
Port 0
Port 1
Port 2
Port 4
Port 3
C505/C505C : 8-bit
A/D Converter
C505A/C505CA : 10-bit
C505C/C505CA only
C505(C)(A)-2R : 16K ROM
C505A-4R/C505CA-4R : 32K ROM
C505A-4E/C505CA-4E : 32K OTP
C505/C505C: 256 byte
C505A/C505CA: 1K byte
256 byte
Program Memory
0
Timer
1
Core