Datasheet

C505/C505C/C505A/C505CA
Data Sheet 38 12.00
8-Bit A/D Converter (C505 and C505C only)
The C505/C505C includes a high performance / high speed 8-bit A/D converter (ADC) with 8 analog
input channels. It operates with a successive approximation technique and provides the following
features:
– 8 multiplexed input channels (port 1), which can also be used as digital outputs/inputs
– 8-bit resolution
– Internal start-of-conversion trigger
– Interrupt request generation after each conversion
– Single or continuous conversion mode
The 8-bit ADC uses two clock signals for operation : the conversion clock f
ADC
(=1/t
ADC
) and the
input clock f
IN
(1/t
IN
). f
ADC
is derived from the C505 system clock f
OSC
which is applied at the XTAL
pins via the ADC clock prescaler as shown in Figure 17. The input clock is equal to f
OSC
. The
conversion clock f
ADC
is limited to a maximum frequency of 1.25 MHz. Therefore, the ADC clock
prescaler must be programmed to a value which assures that the conversion clock does not exceed
1.25 MHz. The prescaler ratio is selected by the bits ADCL1 and ADCL0 of SFR ADCON1.
Figure 17
8-Bit A/D Converter Clock Selection
MCS03299
f
OSC
MUX
Clock Prescaler
Conversion Clock
Input Clock
f
ADC
IN
f
ADCL1
A / D
Converter
Condition:
ADC max
f
< 1.25 MHz
IN
f
=
f
OSC
=
CLP
1
32
8
4
16
ADCL0
MCU System Clock
Rate (f
OSC
)
f
IN
[MHz]
Prescaler
Ratio
f
ADC
[MHz]
ADCL1 ADCL0
2 MHz 2 ÷ 4 0.5 0 0
5 MHz 5 ÷ 4 1.25 0 0
6 MHz 6 ÷ 8 0.75 0 1
10 MHz 10 ÷ 8 1.25 0 1
12 MHz 12 ÷ 16 0.75 1 0
16 MHz 16 ÷ 16110
20 MHz 20 ÷ 16 1.25 1 0