Datasheet

C505/C505C/C505A/C505CA

Data Sheet 37 12.00

CAN Controller Software Initialization

The very first step of the initialization is the CAN controller input clock selection. A divide-by-2

prescaler is enabled by default after reset (Figure 16). Setting bit CMOD (SYSCON.3) disables the

prescaler. The purpose of the prescaler selection is:

– to ensure that the CAN controller is operable when f

osc

is over 10 MHz (bit CMOD =0)

– to achieve the maximum CAN baudrate of 1 Mbaud when f

osc

is 8 MHz (bit CMOD=1)

Figure 16

CAN controller Input Clock Selection

Note : The switch configuration shows the reset state of bit CMOD.

SYSCON.3

(CMOD)

MCS03296

OSC

Full-CAN

Module

CAN

Condition: CMOD = 0, when > 10 MHz

OSC

Frequency (MHz) CMOD

(SYSCON.3)

BRP

(BTR0.0-5)

CAN

baudrate

(Mbaud/sec)

OSC

CAN

8 8 1 000000

8 4 0 000000

0.5

16 8 0 000000