Datasheet

C505/C505C/C505A/C505CA
Data Sheet 28 12.00
Timer / Counter 0 and 1
Timer/Counter 0 and 1 can be used in four operating modes as listed in Table 6 :
In the “timer” function (C/T
= ‘0’) the register is incremented every machine cycle. Therefore the
count rate is
f
OSC
/6.
In the “counter” function the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin (P3.4/T0, P3.5/T1). Since it takes two machine cycles to detect a
falling edge the max. count rate is
f
OSC
/12. External inputs INT0 and INT1 (P3.2, P3.3) can be
programmed to function as a gate to facilitate pulse width measurements. Figure 10 illustrates the
input clock logic.
Figure 10
Timer/Counter 0 and 1 Input Clock Logic
Table 6
Timer/Counter 0 and 1 Operating Modes
Mode Description TMOD Input Clock
M1 M0 internal external (max)
0 8-bit timer/counter with a
divide-by-32 prescaler
00
f
OSC
/6x32 f
OSC
/12x32
1 16-bit timer/counter 0 1
f
OSC
/6 f
OSC
/12
2 8-bit timer/counter with
8-bit autoreload
10
3 Timer/counter 0 used as one
8-bit timer/counter and one
8-bit timer
Timer 1 stops
11
MCS03117
1
&
OSC
C/T = 0
C/T = 1
Control
=1
6
TR1
P3.5/T1
(TMOD)
P3.2/INT0
f
Timer 0/1
Input Clock
OSC
/6
P3.4/T0
TR0
Gate
P3.3/INT1
÷
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