Datasheet

C505/C505C/C505A/C505CA
Data Sheet 13 12.00
Memory Organization
The C505 CPU manipulates operands in the following four address spaces:
– On-chip program memory :16K byte ROM (C505(C)(A)-2R) or
32K byte ROM (C505A-4R/C505CA-4R) or
32K byte OTP (C505A-4E/C505CA-4E)
– Totally up to 64K byte internal/external program memory
– up to 64 Kbyte of external data memory
– 256 bytes of internal data memory
– Internal XRAM data memory :256 byte (C505/C505C)
1K byte (C505A/C505CA)
– a 128 byte special function register area
Figure 5 illustrates the memory address spaces of the C505 versions.
Figure 5
C505 Memory Map Memory Map
Ext.
Int.
(EA = 1)
Ext.
Data
Memory
Int. CAN
Contr.
(256 Byte)
(EA = 0)
Ext.
FFFF
H
8000
H
3FFF /
H
0000
H
Data
Memory
Ext.
F700
H
F6FF
H
0000
H
00
H
H
7F
Regs.
Function
Special
RAM
Internal
RAM
Internal
H
80
H
FF
Addr.
Indirect
Addr.
Direct
Alternatively
"Code Space" "Data Space" "Internal Data Space"
MCB03632
XRAM
Internal
FFFF
H
80
H
FF
H
See table below
for detailed
Data Memory
partitioning
H
4000 /
7FFF
H
Device
CAN Area
C505
C505C
C505A
C505CA
F700 F7FF
HH
Unused Area
F800 FEFF
HH
F700 FEFF
HH
FF00 FFFF
XRAM Area
HH
"Data Space" F700 to FFFF :
HH
F700 F7FF
HH
F800 FBFF
F700 FBFF
H
H
H
H
FF00 FFFF
HH
FC00 FFFF
HH
FC00 FFFF
HH
Unused
Area