Datasheet

C167CR
C167SR
Electrical Parameters
Data Sheet 67 V3.3, 2005-02
upper half of PORT0 (P0H), i.e. bitfield CLKCFG represents the logic levels on pins
P0.15-13 (P0H.7-5).
Table 15 associates the combinations of these three bits with the respective clock
generation mode.
Prescaler Operation
When prescaler operation is configured (CLKCFG = 001
B
) the CPU clock is derived from
the internal oscillator (input clock signal) by a 2:1 prescaler.
The frequency of
f
CPU
is half the frequency of f
OSC
and the high and low time of f
CPU
(i.e.
the duration of an individual TCL) is defined by the period of the input clock
f
OSC
.
The timings listed in the AC Characteristics that refer to TCLs therefore can be
calculated using the period of
f
OSC
for any TCL.
Phase Locked Loop
When PLL operation is configured (via CLKCFG) the on-chip phase locked loop is
enabled and provides the CPU clock (see table above). The PLL multiplies the input
frequency by the factor F which is selected via the combination of pins P0.15-13 (i.e.
f
CPU
= f
OSC
× F). With every F’th transition of f
OSC
the PLL circuit synchronizes the CPU clock
to the input clock. This synchronization is done smoothly, i.e. the CPU clock frequency
does not change abruptly.
Due to this adaptation to the input clock the frequency of
f
CPU
is constantly adjusted so
it is locked to
f
OSC
. The slight variation causes a jitter of f
CPU
which also effects the
duration of individual TCLs.
Table 15 C167CR Clock Generation Modes
CLKCFG
(P0H.7-5)
CPU Frequency
f
CPU
= f
OSC
× F
External Clock
Input Range
1)
1) The external clock input range refers to a CPU clock range of 10 … 33 MHz (PLL operation).
Notes
1 1 1
f
OSC
× 4 2.5 to 8.25 MHz Default configuration
1 1 0
f
OSC
× 3 3.33 to 11 MHz –
1 0 1
f
OSC
× 2 5 to 16.5 MHz –
1 0 0
f
OSC
× 5 2 to 6.6 MHz –
0 1 1
f
OSC
× 1 1 to 33 MHz Direct drive
2)
2) The maximum frequency depends on the duty cycle of the external clock signal.
0 1 0 f
OSC
× 1.5 6.66 to 22 MHz –
0 0 1
f
OSC
/ 2 2 to 66 MHz CPU clock via prescaler
0 0 0
f
OSC
× 2.5 4 to 13.2 MHz –