Datasheet

C164CI/SI
C164CL/SL
Data Sheet 69 V2.0, 2001-05
Figure 21 External Memory Cycle:
Demultiplexed Bus, With Read/Write Delay, Extended ALE
Data Out
Data In
t
38
Address
ALE
CSxL
A21-A16
A15-A0
BHE
,
CSxE
Read Cycle
RD
RdCSx
Write Cycle
WrCSx
t
5
t
16
t
17
t
6
t
39
t
41
t
26
t
28
t
18
t
20
t
14
t
46
t
12
t
48
t
22
t
24
t
12
t
48
t
8
t
42
t
42
t
8
t
50
t
51
t
55
t
53
t
57
BUS
(D15-D8)
D7-D0
BUS
(D15-D8)
D7-D0
WR,
WRL
,
WRH