Datasheet

C164CI/SI
C164CL/SL
Data Sheet 56 V2.0, 2001-05
Sample time and conversion time of the C164CI’s A/D Converter are programmable.
Table 14 should be used to calculate the above timings.
The limit values for
f
BC
must not be exceeded when selecting ADCTC.
Converter Timing Example:
Assumptions:
f
CPU
= 25 MHz (i.e. t
CPU
= 40 ns), ADCTC = ‘00’, ADSTC = ‘00’.
Basic clock
f
BC
= f
CPU
/4 = 6.25 MHz, i.e. t
BC
= 160 ns.
Sample time
t
S
= t
BC
× 8 = 1280 ns.
Conversion time
t
C
= t
S
+ 40 t
BC
+ 2 t
CPU
= (1280 + 6400 + 80) ns = 7.8 µs.
8)
During the sample time the input capacitance C
AIN
can be charged/discharged by the external source. The
internal resistance of the analog source must allow the capacitance to reach its final voltage level within
t
S
.
After the end of the sample time
t
S
, changes of the analog input voltage have no effect on the conversion result.
Values for the sample time
t
S
depend on programming and can be taken from Table 14.
Table 14 A/D Converter Computation Table
ADCON.15|14
(ADCTC)
A/D Converter
Basic Clock
f
BC
ADCON.13|12
(ADSTC)
Sample time
t
S
00 f
CPU
/ 4 00 t
BC
× 8
01
f
CPU
/ 2 01 t
BC
× 16
10
f
CPU
/ 16 10 t
BC
× 32
11
f
CPU
/ 8 11 t
BC
× 64