Datasheet

C164CI/SI
C164CL/SL
Data Sheet 37 V2.0, 2001-05
OPDAT EDC4
H
X --- OTP Progr. Interface Data Register 0000
H
P0H b FF02
H
81
H
Port 0 High Reg. (Upper half of PORT0) 00
H
P0L b FF00
H
80
H
Port 0 Low Reg. (Lower half of PORT0) 00
H
P1H b FF06
H
83
H
Port 1 High Reg. (Upper half of PORT1) 00
H
P1L b FF04
H
82
H
Port 1 Low Reg. (Lower half of PORT1) 00
H
P3 b FFC4
H
E2
H
Port 3 Register 0000
H
P4 b FFC8
H
E4
H
Port 4 Register (7 bits) 00
H
P5 b FFA2
H
D1
H
Port 5 Register (read only) XXXX
H
P5DIDIS b FFA4
H
D2
H
Port 5 Digital Input Disable Register 0000
H
P8 b FFD4
H
EA
H
Port 8 Register (8 bits) 00
H
PECC0 FEC0
H
60
H
PEC Channel 0 Control Register 0000
H
PECC1 FEC2
H
61
H
PEC Channel 1 Control Register 0000
H
PECC2 FEC4
H
62
H
PEC Channel 2 Control Register 0000
H
PECC3 FEC6
H
63
H
PEC Channel 3 Control Register 0000
H
PECC4 FEC8
H
64
H
PEC Channel 4 Control Register 0000
H
PECC5 FECA
H
65
H
PEC Channel 5 Control Register 0000
H
PECC6 FECC
H
66
H
PEC Channel 6 Control Register 0000
H
PECC7 FECE
H
67
H
PEC Channel 7 Control Register 0000
H
PICON b F1C4
H
E E2
H
Port Input Threshold Control Register 0000
H
POCON0H F082
H
E 41
H
Port P0H Output Control Register 0011
H
POCON0L F080
H
E 40
H
Port P0L Output Control Register 0011
H
POCON1H F086
H
E 43
H
Port P1H Output Control Register 0011
H
POCON1L F084
H
E 42
H
Port P1L Output Control Register 0011
H
POCON20 F0AA
H
E 55
H
Dedicated Pin Output Control Register 0000
H
POCON3 F08A
H
E 45
H
Port P3 Output Control Register 2222
H
POCON4 F08C
H
E 46
H
Port P4 Output Control Register 0010
H
POCON8 F092
H
E 49
H
Port P8 Output Control Register 0022
H
PSW b FF10
H
88
H
CPU Program Status Word 0000
H
RP0H b F108
H
E 84
H
System Startup Config. Reg. (Rd. only) XX
H
RSTCON b F1E0
H
m --- Reset Control Register 00XX
H
Table 7 C164CI Registers, Ordered by Name (cont’d)
Name Physical
Address
8-Bit
Addr.
Description Reset
Value