Datasheet

XC167CI-16F
Derivatives
Electrical Parameters
Data Sheet 75 V1.3, 2006-08
4.4.5 External Bus Timing
Figure 20 CLKOUT Signal Timing
Table 20 CLKOUT Reference Signal
Parameter Symbol Limits Unit
Min. Max.
CLKOUT cycle time tc
5
CC 40/30/25
1)
1) The CLKOUT cycle time is influenced by the PLL jitter (given values apply to f
CPU
= 25/33/40 MHz).
For longer periods the relative deviation decreases (see PLL deviation formula).
ns
CLKOUT high time
tc
6
CC8–ns
CLKOUT low time
tc
7
CC6–ns
CLKOUT rise time
tc
8
CC–4ns
CLKOUT fall time
tc
9
CC–4ns
MCT05571
CLKOUT
t
C5
t
C6
t
C7
t
C8
t
C9