Datasheet

C161K
C161O
Data Sheet 49 V2.0, 2001-01
Figure 14 External Memory Cycle:
Multiplexed Bus, No Read/Write Delay, Normal ALE
Data OUT
Address
Address
Data INAddress
MCT04863
A21-A16
(A15-A8)
BHE, CSxE
ALE
CSxL
BUS
RD
RdCSx
Read Cycle
BUS
Write Cycle
t
5
t
16
t
25
t
38
t
39
t
40
t
27
t
17
t
6
t
7
t
19
t
54
t
18
t
9
t
11
t
43
t
45
t
52
t
51
t
23
t
22
t
56
WR, WRL,
WRH
WrCSx
t
13
t
49
t
50
t
9
t
11
t
43
t
45
t
15
t
13
t
47
t
49