Datasheet

ISOFACE™
ISO1H816G
Electrical Characteristics
Datasheet 18 Revision 2.3, 2013-05-16
4.8 SPI Timing
4.9 Reverse Voltage
Parameter
at T
j
= -25 ... 125°C, V
bb
=15...30V, V
CC
= 3.0...5.5V,
unless otherwise specified
Symbol Limit Values Unit Test Condition
min. typ. max.
Serial clock frequency f
SCLK
DC
---
20 MHz
Serial clock period (1/fclk) t
p(SLCK)
50
--- ---
ns
CS
Setup time (falling edge of CS to falling edge of
SCLK)
t
CSS
5
--- ---
CS Hold time (rising edge of SCLK to rising edge
of CS
)
t
CSH
10
--- ---
Data setup time (required time SI to rising edge of
SCLK)
t
SU
6
--- ---
Data hold time (falling edge of SCLK to SI) t
HD
6
--- ---
SO Output valid time
CL = 50pF
t
VALID
--- ---
20
CS
Disable time (CS high time between two
accesses)
t
CSD
20
--- ---
µs
SO Output disable time t
SODIS
20 ns
Parameter
at T
j
= -25 ... 125°C, V
bb
=15...30V, V
CC
= 3.0...5.5V,
unless otherwise specified
Symbol Limit Values Unit Test Condition
min. typ. max.
Reverse voltage
1)2)
R
GND
= 0 Ω
R
GND
= 150 Ω
1) defined by P
tot
2) not subject to production test, specified by design
-V
bb
---
---
---
---
1
45
V
Diode forward on voltage
IF = 1.25A, V
Dx
= low, each channel
-V
ON
--- ---
1.2