Datasheet

Datasheet 14 Version 2.3, 2009-09-16
ISOFACE™
ISO1H801G
Electrical Characteristics
4.7 Input Interface
Parameter
at T
j
= -25 ... 125°C, V
bb
=15...30V, V
CC
=4.5...5.5V, unless
otherwise specified
Symbol Limit Values Unit Test Condition
min. typ. max.
Input low state voltage
(D0 ... D7, DIS, CS, WR)
V
IL
-0.3  0.3 x
V
CC
V
Input high state voltage
(D0 ... D7, DIS, CS, WR)
V
IH
0.7 x
V
CC
 V
CC
+
0.3
Input voltage hysteresis
(D0 ... D7, DIS, CS, WR)
V
IHys
100 mV
Input pull down current
(D0 ... D7, DIS)
I
Idown
100 µA
Input pull up current
(CS, WR)
-I
Iup
100
Output disable time (transition DIS to logic low)
1)2)
1) The time includes the turn-on/off time of the high-side switch and the transmission time via the coreless transformer.
2) If Pin DIS is set to low the outputs are set to low; after DIS set to high a new write cycle is necessary to set the output again.
Normal operation
Turn-off time to 10% V
OUT
R
L
= 47Ω
t
DIS
---
85 170 µs
Output disable time (transition DIS to logic low)
3) The parameter is not subject to production test - verified by design/characterization
1)2)3)
Disturbed operation
Turn-off time to 10% V
OUT
R
L
= 47Ω
t
DIS
--- ---
230
4.8 Parallel Interface Input Timing
Parameter
at T
j
= -25 ... 125°C, V
bb
=15...30V, V
CC
=4.5...5.5V, unless
otherwise specified
Symbol Limit Values Unit Test Condition
min. typ. max.
WR pulse width t
WRPW
20   ns
Data setup time before WR t
DS
20  
Data hold time after WR t
DH
10  
Chip select valid to WR t
CSWR
0  
WR logic high to CS logic high t
WHCS
10  
Delay to next CS cycle t
CSD
10  