Datasheet

Datasheet 10 Version 2.3, 2009-09-16
ISOFACE™
ISO1H801G
Functional Description
3.6 Parallel Interface Timing
CS
WR
DATA
t
WHCS
t
WRPW
D0 - D7
t
DS
t
DH
t
CSWR
t
CSD
OUT0 - OUT7
t
on/off
OUTPUT
Figure 10 Parallel input - output timing diagram
3.7 Transmission Failure Detection
There is a failure detection unit integrated to ensure also a stable functionality during the integrated coreless
transformer transmission. This unit decides wether the transmitted data is valid or not. If four times serial data
coming in from the internal registers is not accepted, the output stages are switched off until the next valid data is
received.