Datasheet

IRFI4019H-117P
www.irf.com 5
Fig 13. Maximum Avalanche Energy Vs. Drain Current
Fig 12. On-Resistance Vs. Gate Voltage
4 5 6 7 8 9 10
V
GS
, Gate-to-Source Voltage (V)
0.0
0.1
0.2
0.3
0.4
0.5
R
D
S
(
o
n
)
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
O
n
R
e
s
i
s
t
a
n
c
e
(
Ω
)
T
J
= 25°C
T
J
= 125°C
I
D
= 5.2A
25 50 75 100 125 150
Starting T
J
, Junction Temperature (°C)
0
50
100
150
200
250
300
350
E
A
S
,
S
i
n
g
l
e
P
u
l
s
e
A
v
a
l
a
n
c
h
e
E
n
e
r
g
y
(
m
J
)
I
D
TOP
0.91A
1.1A
BOTTOM
5.2A
Fig 14. Diode Reverse Recovery Test Circuit for HEXFET
®
Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple ≤ 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P. W .
Period
*** V
GS
= 5V for Logic Level Devices
***
+
-
+
+
+
-
-
-



R
G
V
DD
• dv/dt controlled by R
G
• Driver same type as D.U.T.
• I
SD
controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T

**
*
* Use P-Channel Driver for P-Channel Measurements
** Reverse Polarity for P-Channel