Datasheet

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IR2127(S) / IR21271(S) / IR2128(S) & (PbF)
Symbol Definition Min. Max. Units
V
B
High Side Floating Supply Voltage -0.3 625
V
S
High Side Floating Offset Voltage V
B
- 25 V
B
+ 0.3
V
HO
High Side Floating Output Voltage V
S
- 0.3 V
B
+ 0.3
V
CC
Logic Supply Voltage -0.3 25 V
V
IN
Logic Input Voltage -0.3 V
CC
+ 0.3
V
FLT
FAULT Output Voltage -0.3 V
CC
+ 0.3
V
CS
Current Sense Voltage V
S
- 0.3 V
B
+ 0.3
dV
s
/dt Allowable Offset Supply Voltage Transient — 50 V/ns
P
D
Package Power Dissipation @ T
A
≤ +25°C (8 Lead DIP) — 1.0
(8 Lead SOIC) — 0.625
Rth
JA
Thermal Resistance, Junction to Ambient (8 Lead DIP) — 125
(8 Lead SOIC) — 200
T
J
Junction Temperature — 150
T
S
Storage Temperature -55 150
T
L
Lead Temperature (Soldering, 10 seconds) — 300
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
V
B
High Side Floating Supply Voltage (IR2127/IR2128) V
S
+ 12 V
S
+ 20
(IR21271) V
S
+ 9 V
S
+ 20
V
S
High Side Floating Offset Voltage Note 1 600
V
HO
High Side Floating Output Voltage V
S
V
B
V
CC
Logic Supply Voltage 10 20
V
IN
Logic Input Voltage 0 V
CC
V
FLT
FAULT Output Voltage 0 V
CC
V
CS
Current Sense Signal Voltage V
S
V
S
+ 5
T
A
Ambient Temperature -40 125 °C
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
°C/W
W
°C
V