Datasheet

ManualsBrandsINFINEON TECHNOLOGIES ManualsPMICsPMIC - gate drivers IR 2112-1 Non-inverting Half-bridge DIP 14

Features

• Floating channel designed for bootstrap operation

• Fully operational to +600V

• Tolerant to negative transient voltage

dV/dt immune

• Gate drive supply range from 10 to 20V

• Undervoltage lockout for both channels

• 3.3V logic compatible

Separate logic supply range from 3.3V to 20V

Logic and power ground ±5V offset

• CMOS Schmitt-triggered inputs with pull-down

• Cycle by cycle edge-triggered shutdown logic

• Matched propagation delay for both channels

• Outputs in phase with inputs

Description

The IR2112(S) is a high voltage, high speed power

MOSFET and IGBT driver with independent high and

low side referenced output channels. Proprietary HVIC

and latch immune CMOS technologies enable rugge-

dized monolithic construction. Logic inputs are com-

patible with standard CMOS or LSTTL outputs, down

to 3.3V logic. The output drivers feature a high pulse

Packages

HIGH AND LOW SIDE DRIVER

Product Summary

OFFSET

600V max.

+/- 200 mA / 420 mA

OUT

10 - 20V

on/off

(typ.) 125 & 105 ns

Delay Matching 30 ns

14-Lead PDIP

16-Lead SOIC

(wide body)

www.irf.com 1

Data Sheet No. PD60026-P

IR2112

(

)

current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to sim-

plify use in high frequency applications. The floating channel can be used to drive an N-channel power

MOSFET or IGBT in the high side configuration which operates up to 600 volts.

HIN

up to 600V

LOAD

COM

HIN

LIN

(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections

only. Please refer to our Application Notes and DesignTips for proper circuit board layout.

Typical Connection

Summary of content (15 pages)

PAGE 1
Data Sheet No. PD60026-P IR2112(S) HIGH AND LOW SIDE DRIVER Features • Floating channel designed for bootstrap operation • Fully operational to +600V • Tolerant to negative transient voltage dV/dt immune • Gate drive supply range from 10 to 20V • Undervoltage lockout for both channels • 3.3V logic compatible • • • • Separate logic supply range from 3.
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IR2112(S) Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figures 28 through 35. Symbol Definition VB High Side Floating Supply Voltage VS Min. Max. -0.
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IR2112(S) Dynamic Electrical Characteristics VBIAS (VCC, VBS, VDD) = 15V, CL = 1000 pF, TA = 25°C and VSS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3. Symbol Definition Figure Min. Typ. Max.
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IR2112(S) Functional Block Diagram VB UV DETECT VDD HV LEVEL SHIFT R Q S VDD /VCC LEVEL SHIFT HIN R R PULSE FILTER Q HO S PULSE GEN VS SD VCC UV DETECT VDD /VCC LEVEL SHIFT LIN S LO R Q DELAY COM VSS Lead Definitions Symbol Description VDD Logic supply HIN Logic input for high side gate driver output (HO), in phase SD Logic input for shutdown LIN Logic input for low side gate driver output (LO), in phase VSS Logic ground VB High side floating supply HO High side gate drive
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IR2112(S) <50 V/ns Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit 50% 50% HIN LIN ton toff tr 90% HO LO Figure 3. Switching Time Test Circuit 50% 90% 10% 10% Figure 4. Switching Time Waveform Definition HIN LIN SD tf 50% 50% LO HO tsd HO LO 10% 90% MT MT 90% LO Figure 5. Shutdown Waveform Definitions www.irf.com HO Figure 6.
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IR2112(S) 250 Turn-On Delay Time (ns) Turn-On Delay Time (ns) 250 200 Max. 150 100 Typ. 50 150 100 Typ. 50 0 0 -50 -25 0 25 50 Temperature 75 10 100 125 12 18 20 Turn-Off Delay Time (ns) 250 300 Max. 200 Typ. 100 0 200 Max. 150 100 Typ. 50 0 0 2 4 6 8 10 12 14 16 18 20 -50 -25 VDD Supply Voltage (V) 0 25 50 75 100 Figure 7C. Turn-On Time vs. VDD Supply Voltage Figure 8A. Turn-Off Time vs. Temperature 250 400 200 Max. 150 100 Typ.
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IR2112(S) 250 Shutdown Delay Time (ns) Shutdown Delay Time (ns) 250 200 Max. 150 100 Typ. 50 0 -50 -25 0 25 50 75 100 200 Max. 150 100 Typ. 50 0 10 125 14 18 20 Figure 9B. Shutdown Delay Time vs. VCC/VBS Supply Voltage Figure 9A. Shutdow n Time vs. Temperature 250 Turn-On rise Time (ns) 400 300 Max. 200 100 Typ. 2 4 6 8 10 12 14 16 18 200 150 Max. 100 50 Typ. 0 -50 0 0 20 -25 0 V D D S upply V oltage (V ) 25 50 75 Temperature (°C) 100 125 Figure 10A.
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IR2112(S) 15 Logic "1" Input Threshold (V) T u rn -O ff F a ll T im e (n s ) 125 100 Max. 75 50 Typ. 25 0 10 12 14 16 V B IA S S u p p ly V o lta g e (V ) 18 12 Min. 9 6 3 0 -50 50 75 100 125 15 Figure 12A. Logic “I” Input Threshold vs. Temperature Logic "0" Input Threshold (V) 12 9 3 6 Min. 12 9 Max. 6 3 0 0 L o g ic " 1 " In p u t T re s h o ld 25 15 2 .5 5 7 .5 10 V D D L o g ic 1 2 .5 15 1 7 .
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1 Low Level Output Voltage (V) H igh L eve l O utpu t V olta ge (V ) IR2112(S) 0.8 0.6 0.4 M a x. 0.2 0 10 12 14 16 18 1 0.8 0.6 0.4 Max. 0.2 0 -50 20 -25 V B A IS S upply V otage (V ) 0.6 0.4 Max. 0.2 0 16 18 20 Offset Supply Leakage Current (uA) Low Level Output Voltage (V) 0.8 14 75 100 125 500 400 300 200 Max. 100 0 -50 -25 0 25 50 75 100 125 Temperature (°C) VBIAS Supply Votage (V) Figure 15B. Low Level Output vs. Voltage Figure 16A. Offset Supply Current vs.
PAGE 10
IR2112(S) 300 80 M ax . 60 40 250 Vcc Supply Current (uA) VBS Supply Current (uA) 100 Typ. 20 200 Max. 150 100 50 0 Typ. 0 10 12 14 16 18 20 -5 0 -2 5 0 V B S Floating S upply V oltage (V ) 250 200 Max. 150 100 Typ. 50 100 125 10 Max. 8 6 Typ. 4 2 0 0 10 12 14 16 18 -50 20 -25 0 Figure 18B. VCC Supply Current vs. Voltage Logic "1 " Input Bias Current (uA) 10 8 Max. 4 2 Typ. 0 2 4 6 8 10 12 14 16 VDD Logic Supply Voltage (V) 50 75 100 125 Figure 19A.
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IR2112(S) 5 80 60 Max. 40 20 Typ. 0 0 2 4 6 8 10 12 14 16 V D D L o g ic S u p p ly V o lta g e (V ) 18 20 4 3 2 Max. 1 0 4 6 8 3 2 Max. 1 0 -50 -25 25 50 75 100 125 11 10 Max. 9 Typ. 8 Min. 7 6 -50 10 12 14 16 18 20 -25 0 25 50 75 100 125 Temperature (°C) VDD Supply Voltage (V) Figure 21B. Logic “0” Input Current vs. VDD Voltage Figure 22. VBS Undervoltage (+) vs. Temperature 11 11 10 Max. 9 Typ. 8 Min.
PAGE 12
IR2112(S) 500 Output source Current (mA) VCC Undervoltage Lockout - (V) 11 10 Max. 9 Typ. 8 Min. 7 400 300 Typ. 200 Min. 100 0 6 -50 -25 0 25 50 75 100 -50 125 -25 Figure 25. VCC Undervoltage (-) vs. Temperature 25 50 75 100 125 Figure 26A. Output Source Current vs. Temperature 500 750 Output Sink Current (mA) Output source Current (mA) 0 Tem perature (°C ) Tem perature (°C) 400 Typ. 300 Min. 200 100 0 10 12 14 16 18 20 600 Typ. 450 300 Min.
PAGE 13
IR2112(S) 150 150 320V 125 320V 100 75 140V 10V 50 Junction Temperature (°C) Junction Temperature (°C) 125 25 140V 75 10V 50 25 0 1E+2 100 0 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 Frequency (Hz) 1E+4 1E+5 1E+6 Frequency (Hz) Figure 28. IR2112 TJ vs. Frequency (IRFBC20) Ω, VCC = 15V RGATE = 33Ω Figure 29. IR2112 TJ vs.
PAGE 14
IR2112(S) 320V 150 320V 140V 10V 150 140V 10V 125 Junction Temperature (°C) Junction Temperature (°C) 125 100 75 50 25 100 75 50 25 0 0 1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 Frequency (Hz) 0.0 1E+6 20.0 VSS Logic Supply Offset Voltage (V) -3.0 VS Offset Supply Voltage (V) 1E+5 Figure 35. IR2112S TJ vs. Frequency (IRFPE50) Ω, VCC = 15V RGATE = 10Ω Figure 34. IR2112S TJ vs. Frequency (IRFBC40) Ω, VCC = 15V RGATE = 15Ω Typ. -6.0 -9.0 -12.0 -15.0 16.0 12.0 8.0 Typ. 4.0 0.
PAGE 15
IR2112(S) Case outline 14-Lead PDIP 16-Lead SOIC (wide body) 01-6010 01-3002 03 (MS-001AC) 01 6015 01-3014 03 (MS-013AA) IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 3/25/2003 www.irf.