Datasheet

IFX4949
Application Information
Data Sheet 17 Rev. 1.0, 2012-05-07
Figure 7 Reset Circuit
The reaction time of the reset circuit corresponds to its noise immunity. Standby output voltage drops below the
reset threshold that are only marginally longer than the reaction time will result in a shorter reset delay times.
The nominal reset delay time will be generated for standby output voltage drops longer than approximately 50µs.
The typical reset output waveforms are shown in Figure 8 “Typical Reset Output Waveforms” on Page 17.
Figure 8 Typical Reset Output Waveforms
Reset .vsd
OUT
Ref 1,23V
22K
2.0V
Reset
2uA
D
VReg
Reset _diagram . vsd
OUT
t
1.5V
5.0V
40V
VRT
V
IN
V
OUT
t
RD
t
RR
t
RD
Reset
VRT + 0.1V
t
R
Switch on Switch offInput drop Dump Output overload