Datasheet

Data Sheet 4 Rev. 1.02, 2012-08-24
IFX25401
Pin Configuration
2 Pin Configuration
2.1 Pin Assignment PG-TO263-5, PG-TO252-5
Figure 2 Pin Configuration (top view)
2.2 Pin Definitions and Functions PG-TO263-5, PG-TO252-5
Pin No. Symbol Function
1IInput
block to ground directly at the IC with a ceramic capacitor
2ENEnable
high level input signal enables the IC;
low level input signal disables the IC;
integrated pull-down resistor
3GNDGround
internally connected to heat slug
4N.C.
VA
Not Connected for IFX25401TBV50, IFX25401TEV50
can be open or connected to GND
Voltage Adjust for IFX25401TBV, IFX25401TEV
connect external voltage divider to configure the output voltage
5QOutput
Connect a capacitor between Q and GND close to the IC pins and respect the values
specified for apacitance and ESR in “Functional Range” on Page 6
Heat Slug – Heat Slug
internally connected to GND;
connect to PCB/System GND and heatsink area
AEP02560
15
EN
I
n.c.
Q
VA
GND
PinC onfig_PG-TO-263-5-1.vsd
12345
I
EN
GND
n.c.
Q
VA
GND