Datasheet

Version 2.3 16 19 Nov 2012
CoolSET
®
-F3
ICE3A1065ELJ
Functional Description
it starts to count. When the counter reach 20ms and FB
signal is still below 1.35V, the system enters the Active
Burst Mode. This time window prevents a sudden
entering into the Active Burst Mode due to large load
jumps.
After entering Active Burst Mode, a burst flag is set and
the internal bias is switched off in order to reduce the
current consumption of the IC to approx. 450uA.
It needs the application to enforce the VCC voltage
ab
ove the Undervoltage Lockout level of 10.5V such
that the Startup Cell will not be switched on
accidentally. Or otherwise the power loss will increase
drastically. The minimum VCC level during Active Burst
Mode depends on the load condition and the
application. The lowest VCC level is reached at no load
condition.
3.7.2.2 Working in Active Burst Mode
After entering the Active Burst Mode, the FB voltage
rises as V
OUT
starts to decrease, which is due to the
inactive PWM section. The comparator C6a monitors
the FB signal. If the voltage level is larger than 3.61V,
the internal circuit will be activated; the Internal Bias
circuit resumes and starts to provide switching pulse. In
Active Burst Mode the gate G10 is released and the
current limit is reduced to 0.31V. In one hand, it can
reduce the conduction loss and the other hand, it can
reduce the audible noise. If the load at V
OUT
is still kept
unchanged, the FB signal will drop to 3.0V. At this level
the C6b deactivates the internal circuit again by
switching off the internal Bias. The gate G11 is active
again as the burst flag is set after entering Active Burst
Mode. In Active Burst Mode, the FB voltage is changing
like a saw tooth between 3.0V and 3.61V (see Figure
24).
3.7.2.3 Leaving Active Burst Mode
The FB voltage will increase immediately if there is a
hig
h load jump. This is observed by the comparator C4.
As the current limit is ca. 31% during Active Burst
Mode, a certain load jump is needed so that the FB
signal can exceed 4.5V. At that time the comparator C4
resets the Active Burst Mode control which in turn
blocks the comparator C12 by the gate G10. The
maximum current can then be resumed to stabilize
V
OUT.
1.35V
3.61V
4.5V
V
FB
t
t
0.31V
1.06V
V
CS
10.5V
V
VCC
t
t
450uA
I
VCC
t
2.5mA
V
OUT
t
20ms Blanking Time
Current limit level
during Active Burst
Mode
3.0V
Entering
Active Burst
Mode
Leaving
Active Burst
Mode
Blanking Timer
Figure 24 Signals in Active Burst Mode