Datasheet

Data Sheet 6 Rev. 1.0, 2008-03-18
BTS4130QGA
Pin Configuration
3 Pin Configuration
3.1 Pin Assignment
Figure 2 Pin Configuration
3.2 Pin Definitions and Functions
Pin Symbol Function
1, 10, 11,
12, 15, 16,
19, 20
V
S
Battery voltage; Design the wiring for the simultaneous maximum short circuit
currents from channel 0 and 1 and also for low thermal resistance
2 GND0/1 Ground; Ground connection for channel 0 and 1
3 IN0 Input channel 0; Input signal for channel 0. Activate the channel in case of logic
high level
4
ST 0/1
Diagnostic feedback; of channel 0/1. Open drain.
5 IN1 Input channel 1; Input signal for channel 1. Activate the channel in case of logic
high level
6 GND2/3 Ground; Ground connection for channel 2 and 3
7 IN2 Input channel 2; Input signal for channel 2. Activate the channel in case of logic
high level
8
ST 2/3
Diagnostic feedback; of channel 2/3. Open drain.
9 IN3 Input channel 3; Input signal for channel 3. Activate the channel in case of logic
high level
1
2
3
4
14
13
12
11
ST 0/1
GND0/1
IN0
Vs
5
6
7
IN1
17
16
15
OUT0
OUT1
Vs
GND2/3
Pinout SO20 shared diag.vsd
10
9
8
20
19
18
Vs Vs
Vs
OUT3
OUT2
Vs
Vs
Vs
IN2
ST2/3
IN3