Datasheet

Smart Low-Side Power Switch
BTS3205G
General Product CharacteristicsThermal Resistance
Data Sheet 8 Rev. 1.1, 2011-09-01
4.2 Thermal Resistance
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
4.2.1 Transient Thermal Impedance
Figure 4 Typical Transient Thermal Impedance single pulse, Z
thJA
and Z
thJC
Pos. Parameter Symbol Limit Values Unit Conditions
Min. Typ. Max.
4.2.1 Junction to Soldering Point
R
thJC
––44K/W
1) 2)
1) Not subject to production test, specified by design.
2) Device mounted on PCB according EIA/JEDEC standard JESD51-7 (4-layer FR4, 76.2 mm × 114.3 mm with buried
planes). PCB is mounted vertical without blown air with 0.78W power dissipation generated on the DMOS.
4.2.2 Junction to Ambient R
thJA
–90–K/W
1) 2)
Zth_3205 .emf
10
1
110
-1
10
-2
10
2
10
3
10
-3
10
-4
10
-5
15
0
30
45
60
75
90
Zth [
K
/
W
]
t
p
[ s ]
Z
thJC
Z
thJA