Manual

APPENDIX C - ELECTRICAL INTERFACE .................................................................................14
RS-232 ....................................................................................................................................................14
RS-422 ....................................................................................................................................................14
RS-530 ....................................................................................................................................................14
RS-449 ....................................................................................................................................................14
RS-485 ....................................................................................................................................................15
APPENDIX D - DIRECT MEMORY ACCESS ...............................................................................16
APPENDIX E - ASYNCHRONOUS AND SYNCHRONOUS COMMUNICATIONS..............................17
ASYNCHRONOUS COMMUNICATIONS ....................................................................................................... 17
SYNCHRONOUS COMMUNICATIONS..........................................................................................................18
APPENDIX F - SILK-SCREEN ....................................................................................................19
WARRANTY...............................................................................................................................20
Figures
Figure 1 - Address Selection Table ......................................................................................................................2
Figure 2 - DIP-switch Illustration........................................................................................................................2
Figure 3 Headers E8 & E9, Electrical Interface Selection.................................................................................3
Figure 4 - DMA Selection Headers E2 & E3.......................................................................................................4
Figure 5 - DMA Enable Header E1......................................................................................................................5
Figure 6 - IRQ Header E7.....................................................................................................................................6
Figure 7 - IRQ Mode Header ...............................................................................................................................6
Figure 8 - Asynchronous Communications Bit Diagram.................................................................................17
Figure 9 - Synchronous Communications Bit Diagram...................................................................................18
© Sealevel Systems Inc.
SL9125 Revision 7/2006
Sealevel Systems, Incorporated. All rights reserved.