Manual

Appendix D - Direct Memory Access
Sealevel Systems ACB-104 Page 16
Appendix D - Direct Memory Access
In many instances, it is necessary to transmit and receive data at greater rates than would be possible with simple
port I/O. In order to provide a means for higher rate data transfers, a special function called Direct Memory Access
(DMA) was built into the original IBM PC. The DMA function allows the ACB-104 (or any other DMA compatible
interface) to read or write data to or from memory without using the Microprocessor. This function was originally
controlled by the Intel 8237 DMA controller chip, but may now be a combined function of the peripheral support
chip sets (i.e. Chips & Technology or Symphony chip sets).
During a DMA cycle, the DMA controller chip is driving the system bus in place of the Microprocessor, providing
address and control information. When an interface uses DMA, it activates a DMA request signal (DRQ) to the
DMA controller, which in turn sends a DMA hold request to the Microprocessor. When the Microprocessor
receives the hold request it will respond with an acknowledge to the DMA controller chip. The DMA controller chip
then becomes the owner of the system bus providing the necessary control signals to complete a Memory to I/O or
I/O to Memory transfer. When the data transfer is started, an acknowledge signal (DACK) is sent by the DMA
controller chip to the ACB-104. Once the data has been transferred to or from the ACB-104 the DMA controller
returns control to the Microprocessor.
To use DMA with the ACB-104 requires a thorough understanding of the PC DMA functions. The ACB
Developers Toolkit demonstrates the setup and use of DMA with several source code and high-level language demo
programs. Please refer to the ESCC User’s Manual for more information.