User Manual

IOWA-LX-600 Half-size CPU Card
Page 136
computer is usually a male DE-9 connector.
DAC The Digital-to-Analog Converter (DAC) converts digital signals to
analog signals.
DDR Double Data Rate refers to a dat a bus transferring data on both the
rising and falling edges of the clo c k signal.
DMA Direct Memory Access (DMA) enables some peripheral devices to
bypass the system processor and communicate directly with the
system memo ry.
DIMM Dual Inline Memory Modules are a type of RAM that offer a 64-bit data
bus and have separate electrical contacts on each side of the module.
EHCI The Enhanced Host Controller Interface (EHCI) specification is a
register-level interface description for USB 2.0 Host Controllers.
GbE Gigabit Ethernet (GbE) is an Ethernet version that tra nsfers data at 1.0
Gbps and co mplies with the
33IEEE 802.3-2005 standard.
GPIO General purpose input
IrDA Infrared Dat a Association (IrDA) specify infrared data transmission
protocols used to enable electronic devices to wirelessly communi cate
with each other.
L1 Cache The Level 1 Cache (L1 Cache) is a small memory cache built into the
system processor.
L2 Cache The Level 2 Cache (L2 Cache) is an e xternal p rocessor m emory cache.
LVDS Low-voltage differential signaling (LVDS) is a dual-wire, high-speed
differential electrical signaling system commonly used to connect LCD
displays to a computer.
MAC The Media Access Control (MAC) protocol enables several terminals or
network nodes to comm unicate in a LAN, or other multipoint networks.