User's Manual

I-8091 User Manual Version 1.0 06/2001
http://www.icpdas.com 2-5 ICPDAS
1.2 DDA Technology
The DDA chip is the heart of I-8091 card, it will generate equal-space
pulse train corresponding to specific pulse number during a DDA period.
This mechanism is very useful to execute pulse generation and
interpolation function. The DDA period can be determined by DDA cycle.
Table(1) shows the relation among DDA cycle, DDA period and output
pulse rate. When DDA cycle set to 1, the DDA period is equal to
(1+1)x1.024ms = 2.048ms. The output pulse number can be set to 0~2047,
therefore the maximum output pulse rate will be 1Mpps. The minimum
output pulse rate is 3.83pps when set DDA cycle=254 (DDA period =
(254+1)x1.024ms = 261.12ms).
Fig.(2) DDA mechanism
Table(1) The Relation among DDA cycle, DDA period and output pulse rate.
DDA cycle DDA period Max. pulse
rate(n=2047)
Min. pulse rate (n=1)
1 2.048ms 999511pps 488pps
2 3.072ms 666341pps 325pps
34.096ms . .
.. . .
N (N+1)*1.024ms 2047/(DDA period) 1/(DDA period)
.. . .
254 261.12ms 7839pps 3.83pps
The DDA cycle can be set by i8091_SET_VAR() command which decribed
in charpter 3. The selection criterion of DDA cycle was described as
following.
DDA cycle
X pulse = 3
Y pulse = 6
Z pulse = 4
DDA period