Datasheet

iC-MA
8-BIT ANGULAR HALL SENSOR / ENCODER
Rev C1, Page 6/19
ELECTRICAL CHARACTERISTICS
Operating conditions: VDD = 5V ±10 % , Tj = -40... 125 °C, unless otherwise noted
Item Symbol Parameter Conditions Unit
No. Min. Typ. Max.
General
001 VDD Supply Voltage 4.5 5 5.5 V
002
I(VDD) Supply Current
open pins, normal operation 14 21 mA
open pins, power reduction mode (PRM) 7 14 mA
003 I(VDD)sb Standby Supply Current NEN = VDD 200 µA
004 td(VDD)on Turn-on Delay VDD > 4V, see Figure 5 10 µs
005 td(VDD)off Turn-off Delay VDD < 2.6V 10 µs
Hall Sensor Array
101 Hext Required External Magnetic Field
Strength
at chip surface 20 50 100 kA/m
102 dsens Diameter of Hall Sensor Array 2 mm
103 xdis Displacement of Hall Sensor
Array to Package
Package DFN10 -0.2 0.2 mm
104 Φdis Angular Displacement of Chip
with Reference to Package
Package DFN10 -3 3 DEG
105 hsens Distance Chip Surface to Top of
Package
Package DFN10 400 µm
106 Aabs Absolute Angular Position using magnet with 4 mm diameter, centered to
chip, Hext= 20...100kA/m
-3 3 DEG
Signal Conditioning
201 Voff Offset Voltage on output, with external magnetic field ampli-
tude of 20 kA/m
-50 50 mV
202 TC(Voff) Temperature Coefficient of Offset
Voltage
-50 50 µV/K
203 Vdc Output Mean Value 45 50 55 %VDD
204 Ratio Amplitude Ratio of SIN / COS 0.95 1.00 1.05
205 fhc Cut-off Frequency 20 kHz
206 t()settle Settling Time to 70 % amplitude, Hext= 40 kA/m 80 150 µs
207 V()gain Gain Output Voltage 0.05 4.0 V
208 V()ampl Sine/Cosine Amplitude V()ampl = V()max − Vdc 0.9 1.0 1.1 V
Sine/Digital Converter
301 AArel Relative Angular Error with reference to one period, see Figure 1 -20 20 %
302 f(OSC) Oscillator Frequency 200 256 300 kHz
303 TC(OSC) Temperature Coefficient of Oscil-
lator Frequency
-0.1 %/K
304 hys Converter Hysteresis 1 LSB
Configuration Inputs CFG1, CFG2, CFG3
401 Vt()hi Threshold Voltage high 60 78 % VDD
402 Vt()lo Threshold Voltage low 25 40 % VDD
403 V0() Open Circuit Voltage 43 57 % VDD
404 Ri() Input Resistance 45 150 750 kΩ
Enable Input NEN
501 Vt()hi Threshold Voltage high 2 V
502 Vt()lo Threshold Voltage low 0.8 V
503 Vt()hys Hysteresis Vt()hys= Vt()hi − Vt()lo 100 300 mV
504 Ipu() Pull-up Current V() = 0...VDD − 1V -240 -120 -25 µA
Digital Outputs: A, B, C, D
601 Vs()hi Saturation Voltage high Vs()hi= VDD − V(), I() = -4mA 0.4 V
602 Vs()lo Saturation Voltage low I() = 4 mA 0.4 V
603 tr() Rise Time CL() = 50 pF 60 ns
604 tf() Fall Time CL() = 50 pF 60 ns
605 Ilk() Leakage Current NEN = high, V() = 0... VDD -5 5 µA