Product guide

A cost-optimized storage-rich alternative to traditional enterprise 2U dual-socket servers
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DDR3 Memory with Chipkill ECC Protection
The x3620 M3 ships with registered double data rate III (DDR3) memory and provides Active
Memory features, including advanced Chipkill memory protection (using x4 DIMMs), for up to 16X
better error correction than standard ECC memory. In addition to offering better performance than
DDR2 or fully-buffered memory, DDR3 memory also uses less energy. DDR2 memory already
offered up to 37% lower energy use than fully buffered memory. Now, a generation later, DDR3
memory is even more efficient, using up to 15% less energy than DDR2 memory.
The x3620 M3 currently supports up to 192GB of 1.35V or 1.5V RDIMM (registered DIMM) memory
in 12 DIMM slots. 1.35V DIMMs consume up to 19% less energy than 1.5V DIMMs.
Redesign in the architecture of the Xeon 5500 and 5600 series processors bring radical changes in
the way memory works in these servers. For example, the Xeon 5500 and 5600 series processors
integrate the memory controller inside the processor, resulting in two memory controllers in a 2-
socket system. Each memory controller has three memory channels. Depending on the type of
memory, population of memory, and processor model, the memory may be clocked at 1333MHz,
1066MHz or 800MHz.
Notes: Adding a second processor not only doubles the amount of memory available for use, but
also doubles the number of memory controllers, thus doubling the system memory bandwidth. If you
add a second processor, but no additional memory for the second processor, the second processor
would have to access the memory from the first processor “remotely,” resulting in longer latencies
and lower performance. The latency to access remote memory is almost 75% higher than local
memory access. So, the goal should be to always populate both processors with memory.
The 1333MHz E56xx, L5640, and X56xx processor models support up to 1333MHz memory clock
speed and 2 DIMMs per channel (2DPC) at 1333MHz with single-rank and dual-rank RDIMMs
running at 1.5V. Other 5600 series processors access memory at 1066MHz. The E550x models
support 800MHz clock speed.
Running memory at 1333MHz (where supported) versus 1066MHz offers up to 9% better
performance, while memory running at 1066MHz produces up to 28% better performance than
memory running at 800MHz. Xeon 5500/5600 series processors access memory with almost 50%
lower latency than the earlier 5400 series processors. That can result in faster processing of
latency-sensitive workloads.
Regardless of memory speed, the Xeon 5500/5600 platform represents a significant improvement in
memory bandwidth over the previous Xeon 5400 platform. At 1333MHz, the improvement is almost
500% over the previous generation. This huge improvement is mainly due to the dual integrated
memory controllers and faster DDR3 1333MHz memory. Throughput at 800MHz is 25 gigabytes per
second (GBps); at 1066MHz it’s 32GBps; and at 1333MHz it’s 35GBps. This improvement
translates into improved application performance and scalability.
Memory interleaving refers to how physical memory is interleaved across the physical DIMMs. A
balanced system provides the best interleaving. A Xeon 5500/5600 series processor-based system
is balanced when all memory channels on a socket have the same amount of memory.
The 5500 and 5600 series processors support single-, dual-, and quad-rank memory. A memory rank
is simply a segment of memory that is addressed by a specific address bit.
• A typical memory DIMM description is 4GB 2Rx4 DIMM
• The 2R designator is the rank count for this particular DIMM (2R = dual-rank)
• The x4 designator is the data width of the rank
It is important to ensure that DIMMs with the appropriate number of ranks are populated in each
channel for optimal performance. Whenever possible, use dual-rank DIMMs in the system. Dual-
rank DIMMs offer better interleaving and hence better performance than single-rank DIMMs. For
instance, a system populated with six 2GB dual-rank DIMMs outperforms a system populated with
Ch1 Ch0
Xeon 5600 / 5500
Processor 1
Memory Controller
2
3
Ch2
7
8
5
6
Xeon 5600 / 5500
Processor 2
Ch0
10
11
Ch2
15
1
6
Ch1
1
3
1
4
QPI
Memory Controller