User Manual
Intel
®
Xeon
®
Processor 5600 Series Datasheet Volume 1 63
Electrical Specifications
Note: Please refer to Table 2-18 for TAP Signal Group DC specifications and Table 2-27 for TAP Signal Group
AC specifications.
Figure 2-25. TAP Valid Delay Timing Waveform
Figure 2-26. Test Reset (TRST#), Asynch GTL Input, and PROCHOT# Timing Waveform
Figure 2-27. THERMTRIP# Power Down Sequence
TRST# Assert Time, V = 0.5 * V
TTA
V
T
q
PROCHOT# Pulse Width, V = V
TTA
=
Tq
THERMTRIP#
V
CC
V
TT
Tr
Tr: THERMTRIP# assertion until V
CC
, V
TT
removal










