Datasheet

Ultrascalability combined with extreme availability
features and industry-leading performance
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4
DDR3 Registered Memory with Active Memory Protection
eX5 servers use registered double data rate III (DDR3) DIMMs and provide Active Memory
features, including advanced Chipkill memory protection, for up to 16X better error correction
than standard ECC memory, IBM Memory ProteXion, and optional memory mirroring. In
addition to offering triple the memory bandwidth of DDR2 or fully-buffered memory, DDR3
memory also uses less energy. DDR2 memory already offered up to 37% lower energy use than
fully buffered memory. Now, a generation later, DDR3 memory is even more efficient, using 10-
15% less energy than DDR2 memory.
The x3850 X5 and x3950 X5 servers support up to 1TB of memory per node (chassis) in 64
DIMM sockets. They use PC3-10600 double data rate 3 (DDR3) memory (operating at
1066MHz) for fast access. Adding a second x3850/x3950 X5 server to the first doubles the
memory capacity to 2GB/128 DIMM slots in 8U of rack space.
The standard configuration includes 2 memory cards, which support up to 8 DIMMs apiece. The
system is upgradeable to 8 memory cards per chassis. (With configurations of 8-to-16 DIMMs,
using two memory cards saves cost, but using eight cards increases performance.) If 1TB is not
enough, but you don’t need additional processors, you can attach a 1U MAX5 memory
expansion unit, which adds another 32 DIMM slots (up to 512GB), for a total of 1.5TB in only
5U.
Redesign in the architecture of the x7500 series processors brings radical changes in the way
memory works in these servers. For example, the Xeon 7500 series processors integrate two
memory controllers inside each processor, resulting in eight memory controllers in a four-
socket system. Each processor has four memory channels.
This advanced memory architecture provides up to 333% more aggregate memory bandwidth
(up to 120GBps when using eight memory cards vs. a maximum of 32GBps bandwidth) than
the previous generation, for exceptional memory performance, and quadruple the system
memory capacity of the predecessor x3850 M2 server. By performing reads and writes
simultaneously, it eliminates memory read-to-write blocking latency. In addition, it also offers
innovative data reliability and security features to help improve data integrity, including
enhanced CRC protection, data retry on error detect and buffer registers for improved fault
isolation.
An important guideline is to populate equivalent ranks per channel. For instance, mixing one
single-rank DIMM and one dual-rank DIMM in a channel should be avoided.
Notes: DIMMs must be installed in matching pairs. Also, each CPU requires at least 2 DIMMs. It
is important to ensure that all memory channels in each processor are populated. The relative
memory bandwidth decreases as the number of channels populated decreases. This is because
Xeon 7500
Processor 1
Memory
Controller
1
QPI
Memory
Controller
2 3 4
Xeon 7500
Processor 2
Memory
Controller
1
Memory
Controller
2 3 4
Xeon 7500
Processor 3
Memory
Controller
QPI
Memory
Controller
Xeon 7500
Processor 4
Memory
Controller
Memory
Controller
1 2 3 4 1 2 3 4
Mem
Card
1
Mem
Card
2
Mem
Card
3
Mem
Card
4
Mem
Card
5
Mem
Card
6
Mem
Card
7
Mem
Card
8