Datasheet

ManualsBrandsHynix Manualscomputer componentsHMT42GR7BFR4C-RDT8

Table Of Contents

Description
Features
Ordering Information
Key Parameters
Speed Grade
Address Table
Pin Descriptions
Input/Output Functional Descriptions
Pin Assignments
Registering Clock Driver Specifications
- Capacitance Values
- Input & Output Timing Requirements
On DIMM Thermal Sensor
- Connection of Thermal Sensor
- Temperature-to-Digital Conversion Performance
Functional Block Diagram
- 4GB, 512Mx72 Module(1Rank of x8)
- 8GB, 1Gx72 Module(1Rank of x4) - page1
- 8GB, 1Gx72 Module(1Rank of x4) - page2
- 8GB, 1Gx72 Module(2Rank of x8) - page1
- 8GB, 1Gx72(2Rank of x8) - page2
- 16GB, 2Gx72 Module(2Rank of x4) - page1
- 16GB, 2Gx72 Module(2Rank of x4) - page2
- 16GB, 2Gx72 Module(2Rank of x4) - page3
- 32GB, 4Gx72 Module(4Rank of x4) - page1
- 32GB, 4Gx72 Module(4Rank of x4) - page2
- 32GB, 4Gx72 Module(4Rank of x4) - page3
- 32GB, 4Gx72 Module(4Rank of x4) - page4
- 32GB, 4Gx72 Module(4Rank of x4) - page5
Absolute Maximum Ratings
- Absolute Maximum DC Ratings
- DRAM Component Operating Temperature Range
AC & DC Operating Conditions
- Recommended DC Operating Conditions
AC & DC Input Measurement Levels
- AC and DC Input Levels for Single-Ended Command and Address Signals
- AC and DC Input Levels for Single-Ended Signals
Vref Tolerances
AC and DC Logic Input Levels for Differential Signals
- Differential signal definition
- Differential swing requirements for clock (CK - CK) and strobe (DQS-DQS)
- note : Rising input differential signal shall become equal to or greater than VIHdiff(ac) level and Falling input differential signal shall become equal to or less than VIL(ac) level.
- Single-ended requirements for differential signals
- Differential Input Cross Point Voltage
- Slew Rate Definitions for Single-Ended Input Signals
- Slew Rate Definitions for Differential Input Signals
AC & DC Output Measurement Levels
- Single Ended AC and DC Output Levels
- Differential AC and DC Output Levels
- Single Ended Output Slew Rate
- Differential Output Slew Rate
- Reference Load for AC Timing and Output Slew Rate
Overshoot and Undershoot Specifications
- Address and Control Overshoot and Undershoot Specifications
- Clock, Data, Strobe and Mask Overshoot and Undershoot Specifications
Refresh parameters by device density
Standard Speed Bins
- DDR3-800 Speed Bins
- DDR3-1066 Speed Bins
- DDR3-1333 Speed Bins
- DDR3-1600 Speed Bins
- DDR3-1866 Speed Bins
- Speed Bin Table Notes
Environmental Parameters
IDD and IDDQ Specification Parameters and Test Conditions
IDD Specifications (Tcase: 0 to 95oC)
- 4GB, 512M x 72 R-DIMM: HMT451R7BFR8C
- 8GB, 1G x 72 R-DIMM: HMT41GR7BFR4C
- 8GB, 1G x 72 R-DIMM: HMT41GR7BFR8C
- 16GB, 2G x 72 R-DIMM: HMT42GR7BFR4C
- 32GB, 4G x 72 R-DIMM: HMT84GR7BMR4C
Module Dimensions
- 512Mx72 - HMT451R7BFR8C
- 1Gx72 - HMT41GR7BFR4C
- 1Gx72 - HMT41GR7BFR8C
- 2Gx72 - HMT42GR7BFR4C
- 2Gx72 - HMT42GR7BFR4C - Heat Spreader
- 4Gx72 - HMT84GR7BMR4C
- 4Gx72 - HMT84GR7BMR4C - Heat Spreader

Rev. 1.0 / May. 2014 63

8GB, 1G x 72 R-DIMM: HMT41GR7BFR8C

16GB, 2G x 72 R-DIMM: HMT42GR7BFR4C

Symbol DDR3 1333 DDR3 1600 DDR3 1866 Unit note

IDD0 1187 1232 1277 mA

IDD1 1259 1304 1349 mA

IDD2N 1070 1088 1124 mA

IDD2NT 1142 1160 1214 mA

IDD2P0 426 426 444 mA

IDD2P1 426 426 444 mA

IDD2Q 1052 1070 1106 mA

IDD3N 1142 1160 1196 mA

IDD3P 498 498 516 mA

IDD4R 1592 1682 1835 mA

IDD4W 1637 1727 1880 mA

IDD5B 2177 2222 2240 mA

IDD6 462 462 462 mA

IDD6ET 516 516 516 mA

IDD7 2087 2177 2285 mA

Symbol DDR3 1333 DDR3 1600 DDR3 1866 Unit note

IDD0 1610 1700 1790 mA

IDD1 1754 1844 1934 mA

IDD2N 1376 1412 1484 mA

IDD2NT 1520 1556 1664 mA

IDD2P0 624 624 660 mA

IDD2P1 624 624 660 mA

IDD2Q 1340 1376 1448 mA

IDD3N 1520 1556 1628 mA

IDD3P 768 768 804 mA

IDD4R 2330 2510 2816 mA

IDD4W 2420 2660 2906 mA

IDD5B 3590 3680 3716 mA

IDD6 696 696 696 mA

IDD6ET 804 804 804 mA

IDD7 3410 3590 3806 mA